LE25FS406TT Ver la hoja de datos (PDF) - SANYO -> Panasonic

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LE25FS406TT

4M-bit (512K×8) Serial Flash Memory

SANYO -> Panasonic 

LE25FS406

4. Write Disable

The write disable command sets status register WEN to "0" to prohibit unintentional writing. "Figure 9 Write Disable"

shows the timing waveforms. The write disable command consists only of the first bus cycle, and it is initiated by

inputting (04h). The write disable state (WEN "0") is exited by setting WEN to "1" using the write enable command

(06h).

Figure 8 Write Enable

Figure 9 Write Disable

CS

CS

SCK

SI

SO

Mode3

Mode0

01234567

8CLK

06h

MSB

High Impedance

SCK

SI

SO

Mode3

Mode0

01234567

8CLK

04h

MSB

High Impedance

5. Power-down

The power-down command sets all the commands, with the exception of the silicon ID read command and the

command to exit from power-down, to the acceptance prohibited state (power-down). "Figure 10 Power-down" shows

the timing waveforms. The power-down command consists only of the first bus cycle, and it is initiated by inputting

(B9h). However, a power-down command issued during an internal write operation will be ignored. The power-down

state is exited using the power-down exit command (power-down is exited also when one bus cycle or more of the

silicon ID read command (ABh) has been input). "Figure 11 Exiting from Power-down" shows the timing waveforms of

the power-down exit command.

Figure 10 Power-down

Figure 11 Exiting from Power-down

Power down

mode

Power down

mode

CS

SCK

SI

Mode3

Mode0

tDP

01234567

8CLK

B9h

MSB

CS

SCK

SI

Mode3

Mode0

01234567

tPRB

8CLK

ABh

MSB

High Impedance

SO

High Impedance

SO

No.A1577-10/22

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