KP1830 Ver la hoja de datos (PDF) - Vishay Semiconductors
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KP1830 Datasheet PDF : 10 Pages
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KP1830
Vishay Roederstein
HEAT CONDUCTIVITY (G) AS A FUNCTION OF ORIGINAL PITCH AND CAPACITOR BODY
THICKNESS IN mW/°C
Wmax. (mm)
4.5
5.5
7.5
9.0
HEAT CONDUCTIVITY (mW/°C)
PITCH 5 mm
3
4
6
7
POWER DISSIPATION AND MAXIMUM COMPONENT TEMPERATURE RISE
The power dissipation must be limited in order not to exceed the maximum allowed component temperature rise as a function
of the free air ambient temperature.
The power dissipation can be calculated according type detail specification “HQN-384-01/101: Technical Information Film
Capacitors” with the typical tgd of the curves.
The component temperature rise (T) can be measured (see section “Measuring the component temperature” for more details)
or calculated by T = P/G:
• T = component temperature rise (°C)
• P = power dissipation of the component (mW)
• G = heat conductivity of the component (mW/°C)
MEASURING THE COMPONENT TEMPERATURE
A thermocouple must be attached to the capacitor body as in:
Thermocouple
The temperature is measured in unloaded (Tamb) and maximum loaded condition (TC).
The temperature rise is given by T = TC - Tamb.
To avoid radiation or convection, the capacitor should be tested in a wind-free box.
APPLICATION NOTE AND LIMITING CONDITIONS
To select the capacitor for a certain application, the following conditions must be checked:
1. The peak voltage (Up) shall not be greater than the rated DC voltage (URDC).
2. The peak-to-peak voltage (Up-p) shall not be greater than the maximum (Up-p) to avoid the ionization inception level.
3. The maximum component surface temperature rise must be lower than the limits.
4. The maximum application temperature must be lower than 105 °C.
5. There is no limit for the voltage pulse slope in the application.
Revision: 03-Feb-17
6
Document Number: 26016
For technical questions, contact: dc-film@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
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