SI4362 Ver la hoja de datos (PDF) - Silicon Laboratories

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SI4362

HIGH-PERFORMANCE, LOW-CURRENT RECEIVER

Silicon Laboratories 

Si4362

Table 6. Digital IO Specifications (GPIO_x, SCLK, SDO, SDI, nSEL, nIRQ, SDN)1

Parameter

Rise Time2,3

Fall Time3,4

Symbol

TRISE

TFALL

Test Condition

0.1 x VDD to 0.9 x VDD,

CL = 10 pF,

DRV<1:0> = HH

0.9 x VDD to 0.1 x VDD,

CL = 10 pF,

DRV<1:0> = HH

Min

Typ Max

Unit

—

2.3

—

ns

—

2

—

ns

Input Capacitance

CIN

Logic High Level Input Voltage

VIH

Logic Low Level Input Voltage

VIL

Input Current

IIN

Input Current If Pullup is Activated IINP

Drive Strength for Output Low

Level

IOmaxLL

IOmaxLH

IOmaxHL

IOmaxHH

Drive Strength for Output High

Level

IOmaxLL

IOmaxLH

IOmaxHL

IOmaxHH

Drive Strength for Output High

Level for GPIO0

IOmaxLL

IOmaxLH

IOmaxHL

IOmaxHH

Logic High Level Output Voltage

VOH

Logic Low Level Output Voltage

VOL

0<VIN< VDD

VIL = 0 V

DRV[1:0] = LL3

DRV[1:0] = LH3

DRV[1:0] = HL3

DRV[1:0] = HH3

DRV[1:0] = LL3

DRV[1:0] = LH3

DRV[1:0] = HL3

DRV[1:0] = HH3

DRV[1:0] = LL3

DRV[1:0] = LH3

DRV[1:0] = HL3

DRV[1:0] = HH3

DRV[1:0] = HL

DRV[1:0] = HL

—

2

—

pF

VDD x 0.7 —

—

V

—

— VDD x 0.3 V

–10

—

10

µA

1

—

10

µA

—

6.66

—

mA

—

5.03

—

mA

—

3.16

—

mA

—

1.13

—

mA

—

5.75

—

mA

—

4.37

—

mA

—

2.73

—

mA

—

0.96

—

mA

—

2.53

—

mA

—

2.21

—

mA

—

1.7

—

mA

—

0.80

—

mA

VDD x 0.8 —

—

V

—

— VDD x 0.2 V

Notes:

1. All specifications guaranteed by qualification. Qualification test conditions are listed in the "Qualification Test

Conditions" section in "1.1. Definition of Test Conditions" on page 11.

2. 8 ns is typical for GPIO0 rise time.

3. Assuming VDD = 3.3 V, drive strength is specified at Voh (min) = 2.64 V and Vol(max) = 0.66 V at room temperature.

4. 2.4 ns is typical for GPIO0 fall time.

Rev 0.4

9

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