TQ3132 Ver la hoja de datos (PDF) - TriQuint Semiconductor
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TQ3132 Datasheet PDF : 10 Pages
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TQ3132
Data Sheet
TQ3132 Product Description
The TQ3132 is a miniature low noise amplifier in a small SOT-
23-8 package (2.9X2.8X1.14 mm) with operation at 2.8v. The
LNA specs are designed to be compatible with IS-98 Interim
Standard for Dual-Mode CDMA cellular systems. The LNA
features excellent linearity with small current consumption in all
modes. TQ3132 is configured in a cascode topology with
switching circuitry for the various CDMA output levels. A bias
control circuit sets the quiescent current for each mode and
ensures peak performance over process and temperature.
C2
LNA Gain 1
Select
Switch
Control
Bias
Control
8 VDD
GND 2
7 GND
LNA
IN
3
S6
S1
6
LNA
OUT
S2
LNA 4
GND
S3
S4
S5
C3
5
LNA Mode
Select
Figure 1. TQ3132 Functional Block Diagram
LNA Input Matching Network
Only three external components are needed to tune the LNA
(see Figure 2). The chip uses an external capacitor and inductor
for the input match to pin 3. The output is internally matched to
50 ohms at pin 6. In the TQ3132 the matching network is in the
signal path for all three modes: High Gain, AMPS, and Bypass.
Therefore, some experimentation is required to find the
matching network that provides a compromise between noise
figure and gain for all 3 modes. One could take the values used
on TriQuint’s evaluation board as a starting point (see Figure 2).
The input match will affect the output match to some degree as
well, so S22 should be monitored.
Vdd_LNA
C2
LNA_IN
C1
LNA_GS
C2 1 TQ3132 8
2
3
L1
4
7
LNA_OUT
6
5 C3
LNA_MD
Shorted Board
Inductor
Figure 2. TQ3132 Applications Circuit
Selecting the LNA Vdd Bypass Capacitor
A Vdd bypass capacitor is recommended close to pin 8. The
Vdd bypass capacitor has the largest effect on the LNA output
match. Because the input match affects the output match to
some degree as well, the process of picking the bypass
capacitor value involves some iteration. First, an input match is
selected to give adequate gain and noise figure. Then the
bypass capacitor is varied to give the best output match.
TriQuint’s evaluation board achieves a 2:1 VSWR with the
selected tuning components which allows direct connection to
the input of a SAW filter.
Logic Control Functions
The control lines can be toggled between high and low levels
using CMOS logic circuitry. A logic level high (C3) is applied to
pin 5 to change bias state from CDMA to Amps modes.
Similarly, a logic level high (C2) at pin 1 selects the gain step for
the amplifier. In the high gain mode, switches S1, S2, and S5
are closed, with switches S3 and S4 open. In the bypass mode,
switches S1, S2, and S5 are open, with switches S3 and S4
closed (see figure 1).
6
For additional information and latest specifications, see our website: www.triquint.com
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