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74LVT16500A Datasheet PDF : 20 Pages
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Philips Semiconductors
74LVT16500A
3.3 V 18-bit universal bus transceiver; 3-state
Table 2.
Symbol
B3
VCC
B2
B1
GND
B0
CPAB
GND
Pin description …continued
Pin
Description
49
data input/output B3
50
supply voltage
51
data input/output B2
52
data input/output B1
53
ground (0 V)
54
data input/output B0
55
A-to-B clock input (active falling edge)
56
ground (0 V)
6. Functional description
Table 3. Function table[1]
Operating mode
Control
OEAB
OEBA
disabled
L
disabled, latch data L
disabled, latch data L
disabled, hold data L
disabled, clock data L
disabled, clock data L
transparent
H
transparent
H
latch data and display H
latch data and display H
clock data and display H
clock data and display H
hold data and display H
hold data and display H
LEAB
LEBA
H
↓
↓
L
L
L
H
H
↓
↓
L
L
L
L
CPAB
CPBA
X
X
X
H or L
↓
↓
X
X
X
X
↓
↓
H or L
H or L
Input
An
Bn
X
h
l
X
h
l
H
L
h
l
h
l
X
X
Internal
register
X
H
L
NC
H
L
H
L
H
L
H
L
H
L
[1] H = HIGH voltage level;
h = HIGH voltage level one setup time prior to the enable or clock transition;
L = LOW voltage level;
l = LOW voltage level one setup time prior to the enable or clock transition;
NC = no change;
X = don’t care;
Z = high-impedance OFF-state;
↓ = HIGH-to-LOW enable or clock transition.
Output
Bn
An
Z
Z
Z
Z
Z
Z
H
L
H
L
H
L
H
L
74LVT16500A_3
Product data sheet
Rev. 03 — 29 May 2006
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
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