74HC175 Ver la hoja de datos (PDF) - NXP Semiconductors.
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74HC175 Datasheet PDF : 19 Pages
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NXP Semiconductors
74HC175; 74HCT175
Quad D-type flip-flop with reset; positive-edge trigger
Table 7. Dynamic characteristics …continued
GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit, see Figure 11
Symbol Parameter
Conditions
25 C
40 C to +85 C 40 C to +125 C Unit
Min Typ Max Min Max
Min
Max
fmax
maximum
frequency
CP input; see Figure 8
VCC = 4.5 V
25 49 - 20
-
VCC = 5 V; CL = 15 pF
- 54
-
--
CPD
power
per package;
[3] -
34 -
-
-
dissipation
VI = GND to VCC 1.5 V
capacitance
17
-
-
-
-
-
MHz
MHz
pF
[1] tpd is the same as tPHL and tPLH.
[2] tt is the same as tTHL and tTLH.
[3] CPD is used to determine the dynamic power dissipation (PD in W).
PD = CPD VCC2 fi + (CL VCC2 fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
(CL VCC2 fo) = sum of outputs;
CL = output load capacitance in pF;
VCC = supply voltage in V.
11. Waveforms
9,
&3LQSXW
*1'
92+
4QRXWSXW
92/
92+
4QRXWSXW
92/
IPD[
90
W:
W3+/
90
W3/+
W7+/
90
W7/+
W3/+
W3+/
W7/+
W7+/
DDD
Fig 8.
Measurement points are given in Table 8.
Input to output propagation delay, output transition time, clock input pulse width and maximum
frequency
74HC_HCT175
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 8 April 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
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