74HC175(2016) Ver la hoja de datos (PDF) - NXP Semiconductors.
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Fabricante
74HC175 Datasheet PDF : 19 Pages
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Nexperia
74HC175; 74HCT175
Quad D-type flip-flop with reset; positive-edge trigger
Table 7. Dynamic characteristics …continued
GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit, see Figure 10
Symbol Parameter
Conditions
25 C
40 C to +85 C 40 C to +125 C Unit
Min Typ Max Min Max
Min
Max
tW
pulse width
CP input HIGH or LOW;
see Figure 7
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
MR input LOW;
see Figure 9
80 22 - 100
-
120
- ns
16 8 -
20
-
24
- ns
14 6 -
17
-
20
- ns
VCC = 2.0 V
80 19 - 100
-
120
- ns
VCC = 4.5 V
16 7 -
20
-
24
- ns
VCC = 6.0 V
14 6 -
17
-
20
- ns
trec
recovery time MR to CP; see Figure 9
VCC = 2.0 V
5 33 -
5
-
5
- ns
VCC = 4.5 V
5 12 -
5
-
5
- ns
VCC = 6.0 V
5 10 -
5
-
5
- ns
tsu
set-up time
Dn to CP; see Figure 7
VCC = 2.0 V
80 3 - 100
-
120
- ns
VCC = 4.5 V
16 1 -
20
-
24
- ns
VCC = 6.0 V
14 1 -
17
-
20
- ns
th
hold time
Dn to CP; see Figure 7
VCC = 2.0 V
25 2 -
30
-
40
- ns
VCC = 4.5 V
50 -
6
-
8
- ns
VCC = 6.0 V
40 -
5
-
7
- ns
fmax
maximum
frequency
CP input; see Figure 7
VCC = 2.0 V
6 25 -
4.8
-
4
- MHz
VCC = 4.5 V
30 75 -
24
-
20
- MHz
VCC = 5 V; CL = 15 pF
- 83 -
-
-
-
- MHz
VCC = 6.0 V
35 89 -
28
-
24
- MHz
CPD
power
per package;
dissipation
VI = GND to VCC
capacitance
[3] - 32 -
-
-
-
- pF
74HC_HCT175
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 29 January 2016
.
8 of 19
© Nexperia B.V. 2017. All rights reserved
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