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MAX4760ETX(2007) Ver la hoja de datos (PDF) - Maxim Integrated

Número de pieza
componentes Descripción
Fabricante
MAX4760ETX
(Rev.:2007)
MaximIC
Maxim Integrated MaximIC
MAX4760ETX Datasheet PDF : 14 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
High-Bandwidth, Quad DPDT Switches
ELECTRICAL CHARACTERISTICS (continued)
(V+ = +2.7V to +5.25V, TA = -40°C to +85°C, unless otherwise noted. Typical values are at V+ = 3V, TA = +25°C.) (Notes 2, 3)
PARAMETER
Break-Before-Make (Note 7)
Skew (Note 7)
Charge Injection
On-Channel -3dB Bandwidth
Off-Isolation (Note 8)
SYMBOL
CONDITIONS
tBBM
tSKEW
Q
BW
VISO
V+ = 2.7V, VNO_ or VNC_ = 1.5V;
RL = 50Ω, CL = 35pF, Figure 3
RS = 39Ω, CL = 50pF, Figure 4
VGEN = 0V, RGEN = 0,
CL = 1.0nF, Figure 5
Signal = 0dBm, CL = 5pF, RL = 50Ω
CL = 5pF, RL = 50Ω, VCOM_ = 1VP-P,
f = 100kHz, Figure 6
TA
MIN
+25°C
TMIN to TMAX 2
+25°C
+25°C
+25°C
+25°C
TYP MAX UNITS
15
ns
0.2 0.5
ns
15
pC
320
MHz
100
dB
Crosstalk (Note 9)
Total Harmonic Distortion
NO_, NC_ Off-Capacitance
VCT
CL = 5pF, RL = 50Ω, VCOM_ = 1VP-P,
f = 100kHz, Figure 6
THD f = 20Hz to 20kHz, 1VP-P, RL = 600Ω
CNO_(OFF), VNO_, VNC_ = GND, f = 1MHz,
CNC_(OFF) Figure 7
+25°C
+25°C
+25°C
95
dB
0.03
%
25
pF
COM_ On-Capacitance
CCOM(ON)
VNO_, VNC_ = GND, f = 1MHz,
Figure 7
+25°C
54
pF
COM_ Off-Capacitance
DIGITAL I/O (IN_, EN)
Input-Logic High
Input-Logic Low
Input Leakage Current
POWER SUPPLY
Power-Supply Range
Positive Supply Current
CCOM(OFF)
VCOM_ = GND, f = 1MHz (MAX4761),
Figure 7
+25°C
25
pF
V+ = 2.7V to 3.6V
VIH
V+ = 3.6V to 5.25V
V+ = 2.7V to 3.6V
VIL
V+ = 3.6V to 5.25V
IIN
VIN = 0 or V+
V+
I+
V+ = 4.3V, VIN_ = 0V or V+
TMIN to TMAX 1.4
TMIN to TMAX 2.0
TMIN to TMAX
TMIN to TMAX
TMIN to TMAX
V
0.5
V
0.6
1
µA
TMIN to TMAX 1.8
5.5
V
+25°C
TMIN to TMAX
0.01
µA
1.0
Note 2: The algebraic convention is used in this data sheet; the most negative value is shown in the minimum column.
Note 3: UCSP packages are 100% tested at +25°C and limits across the full temperature range are guaranteed by correlation and
design. Thin QFN packages are 100% tested at +85°C and limits across the full temperature range are guaranteed by cor-
relation and design.
Note 4: RON and ΔRON matching specifications are guaranteed by design.
Note 5: ΔRON = RON(MAX) - RON(MIN).
Note 6: Flatness is defined as the difference between the maximum and minimum value of on-resistance as measured over the
specified analog signal ranges.
Note 7: Guaranteed by design, not production tested.
Note 8: Off-isolation = 20log10 [VCOM_ / (VNO_ or VNC_)], VCOM_ = output, VNO_ or VNC_ = input to off switch.
Note 9: Between any two switches.
_______________________________________________________________________________________ 3

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