6.1.16 DMICESTSâDMI Correctable Error Status ....................................... 172
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Integrated Graphics Device (D2:F0) (IntelÂź 82945G/82945GC/ 82945GZ GMCH Only)173
7.1 Configuration Register Details (D2:F0) .............................................................. 175
7.1.1 VID2âVendor Identification (D2:F0) .................................................. 175
7.1.2 DID2âDevice Identification (D2:F0) .................................................. 175
7.1.3 PCICMD2âPCI Command (D2:F0) ................................................... 176
7.1.4 PCISTS2âPCI Status (D2:F0)........................................................... 177
7.1.5 RID2âRevision Identification (D2:F0)................................................ 178
7.1.6 CCâClass Code (D2:F0) ................................................................... 178
7.1.7 CLSâCache Line Size (D2:F0).......................................................... 179
7.1.8 MLT2âMaster Latency Timer (D2:F0) ............................................... 179
7.1.9 HDR2âHeader Type (D2:F0) ............................................................ 179
7.1.10 MMADRâMemory Mapped Range Address (D2:F0) ........................ 180
7.1.11 IOBARâI/O Base Address (D2:F0) ................................................... 181
7.1.12 GMADRâGraphics Memory Range Address (D2:F0) ....................... 182
7.1.13 GTTADRâGraphics Translation Table Range Address (D2:F0)....... 182
7.1.14 SVID2âSubsystem Vendor Identification (D2:F0)............................. 183
7.1.15 SID2âSubsystem Identification (D2:F0) ............................................ 183
7.1.16 ROMADRâVideo BIOS ROM Base Address (D2:F0) ....................... 183
7.1.17 CAPPOINTâCapabilities Pointer (D2:F0) ......................................... 184
7.1.18 INTRLINEâInterrupt Line (D2:F0) ..................................................... 184
7.1.19 INTRPINâInterrupt Pin (D2:F0) ......................................................... 184
7.1.20 MINGNTâMinimum Grant (D2:F0) .................................................... 185
7.1.21 MAXLATâMaximum Latency (D2:F0) ............................................... 185
7.1.22 MCAPPTRâMirror of Device 0 Capability Pointer (D2:F0)
(Mirrored_D0_34) ............................................................................... 185
7.1.23 MCAPIDâMirror of Device 0 Capability Identification (D2:F0)
(Mirrored_D0_E0) ............................................................................... 185
7.1.24 MGGCâMirror of Device 0 GMCH Graphics Control (D2:F0)
(Mirrored_D0_52) ............................................................................... 186
7.1.25 MDEVENâMirror of Device 0 Device Enable (D2:F0)
(Mirrored_D0_54) ............................................................................... 186
7.1.26 BSMâBase of âStolenâ Memory (D2:F0) ........................................... 186
7.1.27 PMCAPIDâPower Management Capabilities ID (D2:F0).................. 187
7.1.28 PMCAPâPower Management Capabilities (D2:F0) .......................... 187
7.1.29 PMCSâPower Management Control/Status (D2:F0) ........................ 188
7.1.30 SWSMIâSoftware SMI (D2:F0) ......................................................... 188
7.1.31 ASLEâSystem Display Event Register (D2:F0) ................................ 189
7.1.32 ASLSâASL Storage (D2:F0) ............................................................. 189
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Integrated Graphics Device (D2:F1) Registers (IntelÂź 82945G/82945GC/82945GZ
GMCH Only).................................................................................................................... 191
8.1.1
8.1.2
8.1.3
8.1.4
8.1.5
8.1.6
8.1.7
8.1.8
8.1.9
8.1.10
VID2âVendor Identification (D2:F1) .................................................. 192
DID2âDevice Identification (D2:F1) .................................................. 192
PCICMD2âPCI Command (D2:F1) ................................................... 193
PCISTS2âPCI Status (D2:F1)........................................................... 194
RID2âRevision Identification (D2:F1)................................................ 195
CCâClass Code Register (D2:F1)..................................................... 195
CLSâCache Line Size (D2:F1).......................................................... 196
MLT2âMaster Latency Timer (D2:F1) ............................................... 196
HDR2âHeader Type Register (D2:F1).............................................. 196
MMADRâMemory Mapped Range Address (D2:F1) ........................ 197
IntelÂź 82945G/82945G/82945GC GMCH and 82945P/82945PL MCH Datasheet
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