W29GL128C Ver la hoja de datos (PDF) - Winbond
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W29GL128C Datasheet PDF : 67 Pages
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W29GL128C
1 GENERAL DESCRIPTION
The W29GL128C Parallel Flash memory provides a storage solution for embedded system
applications that require better performance, lower power consumption and higher density. The device
has a random access speed of 90ns and a fast page access speed of 25ns, as well as significantly
faster program and erase time than the products available on the market today. The W29GL128C also
offers special features such as Compatible Manufacturer ID that makes the device industry standard
compatible without the need to change firmware.
2 FEATURES
64k-Word/128k-Byte uniform sector
architecture
– Total 128 uniform sectors
32-Word/64-Byte write buffer
– Reduces total program time for
multiple-word updates
8-Word/16-Byte page read buffer
Secured Silicon Sector area
– Programmed and locked by the
customer or during production
– 128-word/256-byte sector for
permanent, safe identification using an
8-word/16-byte random electronic
serial number
Enhanced Sector Protect using
Dynamic and Individual mechanisms
Polling/Toggling methods are used to
detect the status of program and erase
operation
Suspend and resume commands used
for program and erase operations
More than 100,000 erase/program
cycles
More than 20-year data retention
Software and Hardware write
protection
– Write-Protect all or a portion of
memory
– Enable/Disable protection with #WP
pin
– Top or bottom array protection
Low power consumption
Deep power down mode
Wide temperature range
Compatible manufacturer ID for drop-in
replacement
– No firmware change is required
Faster Erase and Program time
– Erase is 1.5x faster than industry
standard
– Program is 2x faster than industry
standard
– Allows for improved production
throughput and faster field updates
CFI (Common Flash Interface) support
Single 3V Read/Program/Erase (2.7 -
3.6V)
Enhanced Variable IO control
– All input levels (address, control, and
DQ) and output levels are determined
by voltage on the EVIO input. EVIO
ranges from 1.65 to VCC
#WP/ACC Input
– Accelerates programming time (when
VHH is applied) for greater throughput
during system production
– Protects first or last sector regardless
of sector protection settings
Hardware reset input (#reset) resets
device
Ready/#Busy output (RY/#BY) detects
completion of program or erase cycle
Packages
– 56-pin TSOP
– 56-ball TFBGA
– 64-ball LFBGA
Publication Release Date: August 2, 2013
1
Revision H
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