MGA-81563-BLKG Ver la hoja de datos (PDF) - Avago Technologies
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MGA-81563-BLKG Datasheet PDF : 11 Pages
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The power supply is bypassed to ground with capacitor
C3 to keep RF off of the DC lines and to prevent gain dips
or peaks in the response of the amplifier.
An additional bypass capacitor, C4, may be added to the
bias line near the Vd connection to eliminate unwanted
feedback through bias lines that could cause oscillation.
C4 will not normally be needed unless several stages are
cascaded using a common power supply.
When multiple bypass capacitors are used, consideration
should be given to potential resonances. It is important
to ensure that the capacitors when combined with addi-
tional parasitic L’s and C’s on the circuit board do not form
resonant circuits. The addition of a small value resistor in
the bias supply line between bypass capacitors will often
“de-Q” the bias circuit and eliminate the effect of a reso-
nance.
The value of the DC blocking and RF bypass capacitors
(C1 – C3) should be chosen to provide a small reactance
(typically < 5 ohms) at the lowest operating frequency.
The reactance of the RF choke (RFC) should be high (e.g.,
several hundred ohms) at the lowest frequency of opera-
tion.
The MGA-81563’s response at low frequencies is limited
to approximately 100 MHz by the size of capacitors inte-
grated on the MMIC chip.
The input of the MGA-81563 is partially matched inter-
nally to 50 Ω. Without external matching elements, the
input VSWR of the MGA-81563 is 3.0:1 at 300 MHz and de-
creases to 1.5:1 at 6 GHz. This will be adequate for many
applications. If a better input VSWR is required, the use of
a series inductor, L1 in the applications example, (or, alter-
natively a length of high impedance transmission line) is
all that is needed to improve the match. The table in Fig-
ure 16 shows suggested values for L1 for various wireless
frequency bands.
Frequency
(GHz)
0.9
1.5
1.9
2.4
4.0
5.8
Figure 16. Values for L1.
Inductor, L1
(nH)
10
6.8
3.9
2.7
0.5
0
These values for L1 take into account the short length of
50Ω transmission line between the inductor and the input
pin of the device.
For applications requiring minimum noise figure (NF ),
o
some improvement over a 50Ω match is possible by
matching the signal input to the optimum noise match
impedance, *o, as specified in the “Typical Noise Param-
eters” table.
For most applications, as shown in the example circuit,
the output of the MGA-81563 is already sufficiently well
matched to 50Ω and no additional matching is needed.
The nominal device output VSWR is ≤ 2.2:1 from 300 MHz
through 6 GHz.
The completed application amplifier with all components
and SMA connectors is shown in Figure 17.
C1 L1
IN
MGA-8-A
OUT
C2
RFC
C3
+V
C4
Figure 17. Complete Application Circuit.
Operation in Saturation for Higher Output Power
For applications such as pre-driver and driver stages in
transmitters, the MGA-81563 can be operated in satura-
tion to deliver up to 50 mW (17 dBm) of output power. The
power added efficiency increases to 45% at these power
levels.
There are several design considerations related to reliabil-
ity and performance that should be taken into account
when operating the amplifier in saturation.
First of all, it is important that the stage preceding the
MGA-81563 not overdrive the device. Referring to the “Ab-
solute Maximum Ratings” table, the maximum allowable
input power is +13 dBm. This should be regarded as the
input power level above which the device could be per-
manently damaged.
Driving the amplifier into saturation will also affect elec-
trical performance. Figure 18 presents the Output Power,
Third Order Intercept Point (Output IP , and Power Added
3)
Efficiency (PAE) as a function of Input Power. This data
represents performance into a 50: load. Since the output
impedance of the device changes when driven into satu-
ration, it is possible to obtain even more output power
with a “power match.” The optimum impedance match for
maximum output power is dependent on frequency and
actual output power level and can be arrived at empiri-
cally.
7
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