AT17LV256-10SI Ver la hoja de datos (PDF) - Atmel Corporation
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AT17LV256-10SI Datasheet PDF : 14 Pages
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Features
• EE Programmable 65,536 x 1-, 131,072 x 1-, and 262,144 x 1-bit Serial Memories
Designed to Store Configuration Programs for Field Programmable Gate
Arrays (FPGAs)
• In-System Programmable via 2-wire Bus
• Simple Interface to SRAM FPGAs
• Compatible with Atmel AT6000, AT40K FPGAs, Altera FLEX® Devices, Lucent ORCA®
FPGAs, Xilinx XC3000, XC4000, XC5200, SPARTAN® FPGAs, Motorola MPA1000 FPGAs
• Cascadable Read Back to Support Additional Configurations or Future Higher-density
Arrays (128K and 256K only)
• Low-power CMOS EEPROM Process
• Programmable Reset Polarity
• Available in the Space-efficient Plastic DIP or SOIC Packages; PLCC Package is
Pin-compatible Across Product Family
• Emulation of Atmel’s AT24CXXX Serial EEPROMs
• Available in 3.3V ± 10% LV and 5V ± 5% C Versions
• Low-power Standby Mode
Description
The AT17C65/128/256 and AT17LV65/128/256 (low-density AT17 Series) FPGA
Configuration EEPROMs (Configurators) provide an easy-to-use, cost-effective con-
figuration memory for Field Programmable Gate Arrays. The low-density AT17 Series
is packaged in the 8-pin PDIP, 8-lead SOIC, and the popular 20-lead PLCC and
SOIC. The AT17 Series family uses a simple serial-access procedure to configure one
or more FPGA devices. The AT17 Series organization supplies enough memory to
configure one or multiple smaller FPGAs. Using a feature of the AT17 Series, the user
can select the polarity of the reset function by programming a special EEPROM byte.
These devices also support a write-protection mechanism within its programming
mode.
The AT17 Series Configurators can be programmed with industry-standard program-
mers, or Atmel’s ATDH2200E Programming Kit.
FPGA
Configuration
EEPROM
Memory
64K, 128K and 256K
AT17C65
AT17LV65
AT17C128
AT17LV128
AT17C256
AT17LV256
Pin Configurations
20-lead PLCC
CLK 4
NC 5
(WP) RESET/OE 6
NC 7
CE 8
18 NC
17 SER_EN
16 NC
15 NC
14 CEO (A2)
20-lead SOIC
NC 1
DATA 2
NC 3
CLK 4
NC 5
(WP) RESET/OE 6
NC 7
CE 8
NC 9
GND 10
20 VCC
19 NC
18 NC
17 SER_EN
16 NC
15 NC
14 CEO (A2)
13 NC
12 NC
11 NC
8-pin PDIP
DATA 1
CLK 2
(WP) RESET/OE 3
CE 4
8 VCC
7 SER_EN
6 CEO (A2)
5 GND
8-lead SOIC
DATA 1
CLK 2
(WP) RESET/OE 3
CE 4
8 VCC
7 SER_EN
6 CEO (A2)
5 GND
Rev. 1636B–05/00
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