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74LVC1G02-Q100 Ver la hoja de datos (PDF) - NXP Semiconductors.

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componentes Descripción
Fabricante
74LVC1G02-Q100
NXP
NXP Semiconductors. NXP
74LVC1G02-Q100 Datasheet PDF : 13 Pages
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Nexperia
74LVC1G02-Q100
Single 2-input NOR gate
6.2 Pin description
Table 3. Pin description
Symbol
Pin
B
1
A
2
GND
3
Y
4
VCC
5
7. Functional description
Description
data input
data input
ground (0 V)
data output
supply voltage
Table 4. Function table[1]
Inputs
A
B
L
L
L
H
H
L
H
H
[1] H = HIGH voltage level; L = LOW voltage level.
8. Limiting values
Outputs
Y
H
L
L
L
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Min
Max Unit
VCC
supply voltage
IIK
input clamping current
VI
input voltage
IOK
output clamping current
VO
output voltage
VI < 0 V
VO > VCC or VO < 0 V
Active mode
Power-down mode
0.5
50
[1]
0.5
-
[1][2]
0.5
[1][2]
0.5
+6.5 V
-
mA
+6.5 V
50 mA
VCC + 0.5 V
+6.5 V
IO
output current
VO = 0 V to VCC
-
50 mA
ICC
IGND
Ptot
Tstg
supply current
ground current
total power dissipation
storage temperature
Tamb = 40 C to +125 C
-
100
[3]
-
65
+100 mA
-
mA
250 mW
+150 C
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] When VCC = 0 V (Power-down mode), the output voltage can be 5.5 V in normal operation.
[3] For TSSOP5 and SC-74A packages: above 87.5 C the value of Ptot derates linearly with 4.0 mW/K.
74LVC1G02_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 7 December 2016
© Nexperia B.V. 2017. All rights reserved
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