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74HC4052-Q100 Ver la hoja de datos (PDF) - NXP Semiconductors.

Número de pieza
componentes Descripción
Fabricante
74HC4052-Q100
NXP
NXP Semiconductors. NXP
74HC4052-Q100 Datasheet PDF : 26 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Nexperia
74HC4052-Q100; 74HCT4052-Q100
Dual 4-channel analog multiplexer/demultiplexer
7. Functional description
7.1 Function table
Table 3. Function table[1]
Input
E
S1
S0
L
L
L
L
L
H
L
H
L
L
H
H
H
X
X
[1] H = HIGH voltage level; L = LOW voltage level; X = don’t care.
8. Limiting values
Channel on
nY0 and nZ
nY1 and nZ
nY2 and nZ
nY3 and nZ
none
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Voltages are referenced to VEE = GND (ground = 0 V).
Symbol Parameter
Conditions
VCC
IIK
ISK
ISW
IEE
ICC
IGND
Tstg
Ptot
P
supply voltage
input clamping current
switch clamping current
switch current
supply current
supply current
ground current
storage temperature
total power dissipation
power dissipation
VI < 0.5 V or VI > VCC + 0.5 V
VSW < 0.5 V or VSW > VCC + 0.5 V
0.5 V < VSW < VCC + 0.5 V
per switch
Min
[1] 0.5
-
-
-
-
-
-
65
[2] -
-
Max
Unit
+11.0
V
20
mA
20
mA
25
mA
20
mA
50
mA
50
mA
+150
C
500
mW
100
mW
[1] To avoid drawing VCC current out of pins nZ, when switch current flows in pins nYn, the voltage drop across the bidirectional switch must
not exceed 0.4 V. If the switch current flows into pins nZ, no VCC current flows out of pins nYn. In this case there is no limit for the
voltage drop across the switch, but the voltages at pins nYn and nZ may not exceed VCC or VEE.
[2] For SO16 packages: above 70 C the value of Ptot derates linearly with 8 mW/K.
For TSSOP16 package: above 60 C the value of Ptot derates linearly with 5.5 mW/K.
For DHVQFN16 package: above 60 C the value of Ptot derates linearly with 4.5 mW/K.
74HC_HCT4052_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 22 November 2012
© Nexperia B.V. 2017. All rights reserved
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