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74HC4052-Q100 Datasheet PDF : 26 Pages
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Nexperia
74HC4052-Q100; 74HCT4052-Q100
Dual 4-channel analog multiplexer/demultiplexer
6. Pinning information
6.1 Pinning
74HC4052-Q100
74HCT4052-Q100
2Y0 1
2Y2 2
2Z 3
2Y3 4
2Y1 5
E6
VEE 7
GND 8
16 VCC
15 1Y2
14 1Y1
13 1Z
12 1Y0
11 1Y3
10 S0
9 S1
aaa-003162
Fig 5. Pin configuration for SO16 and TSSOP16
74HC4052-Q100
74HCT4052-Q100
terminal 1
index area
2Y2 2
2Z 3
2Y3 4
2Y1 5
E6
VEE 7
VCC(1)
15 1Y2
14 1Y1
13 1Z
12 1Y0
11 1Y3
10 S0
aaa-003163
Transparent top view
(1) This is not a supply pin. The substrate is attached to this
pad using conductive die attach material. There is no
electrical or mechanical requirement to solder this pad.
However, if it is soldered, the solder land should remain
floating or be connected to VCC.
Fig 6. Pin configuration for DHVQFN16
6.2 Pin description
Table 2. Pin description
Symbol
Pin
2Y0, 2Y1, 2Y2, 2Y3 1, 5, 2, 4
1Z, 2Z
13, 3
E
6
VEE
7
GND
8
S0, S1
10, 9
1Y0, 1Y1, 1Y2, 1Y3 12, 14, 15, 11
VCC
16
Description
independent input or output
common input or output
enable input (active LOW)
negative supply voltage
ground (0 V)
select logic input
independent input or output
positive supply voltage
74HC_HCT4052_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 22 November 2012
© Nexperia B.V. 2017. All rights reserved
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