74AHCT259PW-Q100J Ver la hoja de datos (PDF) - NXP Semiconductors.

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Fabricante

74AHCT259PW-Q100J

8-bit addressable latch

NXP Semiconductors. 

NXP Semiconductors

74AHC259-Q100; 74AHCT259-Q100

8-bit addressable latch

5. Pinning information

5.1 Pinning

Fig 4. Pin configuration

$+&4

$+&74

$ 

$ 

$ 

4 

4 

4 

4 

*1' 

 9&&

 05

 /(

 '

 4

 4

 4

 4

DDD

5.2 Pin description

Table 2.

Symbol

A0

A1

A2

Q0

Q1

Q2

Q3

GND

Q4

Q5

Q6

Q7

D

LE

MR

VCC

Pin description

Pin

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

Description

address input

address input

address input

latch output

latch output

latch output

latch output

ground (0 V)

latch output

latch output

latch output

latch output

data input

latch enable input (active LOW)

conditional reset input (active LOW)

supply voltage

74AHC_AHCT259_Q100

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 1 — 22 July 2013

© NXP B.V. 2013. All rights reserved.

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