L6474
Electrical characteristics
Table 5. Electrical characteristics (continued)
Symbol
Parameter
Test condition
Min. Typ. Max. Unit
Logic inputs and outputs
VIL
Low logic level input voltage
VIH
High logic level input voltage
IIH
High logic level input current (4)
IIL
Low logic level input current (5)
VOL
Low logic level output voltage (6)
VOH
High logic level output voltage
RPU
RPD
RPUDIR
Ilogic
CS pull-up and STBY pull-down resistors
DIR input pull-up resistance
Internal logic supply current
0.8 V
2
V
VIN = 5 V
VIN = 0 V
VDD = 3.3 V, IOL = 4 mA
VDD = 5 V, IOL = 4 mA
VDD = 3.3 V, IOH = 4 mA
VDD = 5 V, IOH = 4 mA
CS = GND;
STBY/RST = 5 V
1 µA
-1
µA
0.3
V
0.3
2.4
V
4.7
335 430 565 kΩ
DIR = GND
60 85 110 kΩ
3.3 V VREG externally
supplied, internal oscillator
3.7 4.3 mA
Ilogic,STBY Standby mode internal logic supply current
3.3 V VREG externally
supplied
2 2.5 µA
fSTCK Step clock input frequency
2 MHz
Internal oscillator and external oscillator driver
fosc,i
Internal oscillator frequency
Tj = 25 °C, VREG = 3.3 V -3% 16 +3% MHz
fosc,e Programmable external oscillator frequency
8
32 MHz
Internal oscillator 3.3 V
VOSCOUTH OSCOUT clock source high level voltage
VREG externally supplied; 2.4
V
IOSCOUT = 4 mA
VOSCOUTL OSCOUT clock source low level voltage
Internal oscillator 3.3 V
VREG externally supplied;
IOSCOUT = 4 mA
0.3 V
trOSCOUT
tfOSCOUT
OSCOUT clock source rise and fall time
Internal oscillator
20 ns
textosc Internal to external oscillator switching delay
3
ms
tintosc External to internal oscillator switching delay
1.5
µs
SPI
fCK,MAX
trCK
tfCK
thCK
tlCK
tsetCS
Maximum SPI clock frequency (7)
SPI clock rise and fall time (7)
SPI clock high and low time (7)
Chip select set-up time (7)
CL = 30 pF
5
MHz
25 ns
75
ns
350
ns
Doc ID 022529 Rev 2
11/51