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DSPIC30F6014

High Performance Digital Signal Controllers

Microchip Technology 

dsPIC30F6011/6012/6013/6014

Table 1-1 provides a brief description of device I/O

pinouts and the functions that may be multiplexed to a

port pin. Multiple functions may exist on one port pin.

When multiplexing occurs, the peripheral module’s

functional requirements may force an override of the

data direction of the port pin.

TABLE 1-1: PINOUT I/O DESCRIPTIONS

Pin Name

Pin

Type

Buffer

Type

Description

AN0-AN15

AVDD

AVSS

CLKI

CLKO

CN0-CN23

COFS

CSCK

CSDI

CSDO

C1RX

C1TX

C2RX

C2TX

EMUD

EMUC

EMUD1

EMUC1

EMUD2

EMUC2

EMUD3

EMUC3

I

Analog

Analog input channels.

AN0 and AN1 are also used for device programming data and

clock inputs, respectively.

P

P

Positive supply for analog module.

P

P

Ground reference for analog module.

I

ST/CMOS External clock source input. Always associated with OSC1 pin

function.

O

—

Oscillator crystal output. Connects to crystal or resonator in

Crystal Oscillator mode. Optionally functions as CLKO in RC

and EC modes. Always associated with OSC2 pin

function.

I

ST

Input change notification inputs.

Can be software programmed for internal weak pull-ups on all

inputs.

I/O

ST

Data Converter Interface frame synchronization pin.

I/O

ST

Data Converter Interface serial clock input/output pin.

I

ST

Data Converter Interface serial data input pin.

O

—

Data Converter Interface serial data output pin.

I

ST

CAN1 bus receive pin.

O

—

CAN1 bus transmit pin.

I

ST

CAN2 bus receive pin.

O

—

CAN2 bus transmit pin

I/O

ST

ICD Primary Communication Channel data input/output pin.

I/O

ST

ICD Primary Communication Channel clock input/output pin.

I/O

ST

ICD Secondary Communication Channel data

input/output pin.

I/O

ST

ICD Secondary Communication Channel clock input/output pin.

I/O

ST

ICD Tertiary Communication Channel data input/output pin.

I/O

ST

ICD Tertiary Communication Channel clock input/output pin.

I/O

ST

ICD Quaternary Communication Channel data

input/output pin.

I/O

ST

ICD Quaternary Communication Channel clock input/output pin.

IC1-IC8

I

ST

Capture inputs 1 through 8.

INT0

INT1

INT2

INT3

INT4

I

ST

External interrupt 0.

I

ST

External interrupt 1.

I

ST

External interrupt 2.

I

ST

External interrupt 3.

I

ST

External interrupt 4.

LVDIN

I

Analog

Low Voltage Detect Reference Voltage input pin.

MCLR

I/P

ST

Master Clear (Reset) input or programming voltage input. This

pin is an active low Reset to the device.

OCFA

OCFB

OC1-OC8

I

ST

Compare Fault A input (for Compare channels 1, 2, 3 and 4).

I

ST

Compare Fault B input (for Compare channels 5, 6, 7 and 8).

O

—

Compare outputs 1 through 8.

Legend: CMOS = CMOS compatible input or output

ST = Schmitt Trigger input with CMOS levels

I

= Input

Analog = Analog input

O

= Output

P

= Power

DS70117C-page 10

Preliminary

 2004 Microchip Technology Inc.

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