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SSL4120T Datasheet PDF : 48 Pages
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NXP Semiconductors
SSL4120
Resonant power supply controller IC with PFC for LED lighting
7.2.3 High-side driver floating supply (SUPHS pin)
The high-side driver is supplied by an external bootstrap buffer capacitor, CSUPHS. The
bootstrap capacitor is connected between the high-side reference the HB pin and the
high-side driver supply input the SUPHS pin. CSUPHS is charged from the SUPREG pin
using an external diode DSUPHS.
Careful selection of the appropriate diode minimizes the voltage drop between SUPREG
and SUPHS, especially when large MOSFETs and high switching frequencies are used.
7.2.4 High-voltage supply input (SUPHV pin)
In a stand-alone power supply application, the SUPHV pin is connected to Vboost. CSUPIC
and CSUPREG are charged using the HV start-up source (which delivers a constant current
from SUPHV to SUPIC) using this pin.
Short-circuit protection on the SUPIC pin (SCP-SUPIC; see Section 7.9) limits dissipation
in the HV start-up source when SUPIC is shorted to ground. SCP-SUPIC limits the current
on SUPHV to Ired(SUPHV) when the voltage on SUPIC is less than Vscp(SUPIC).
Under normal operating conditions, the SUPIC pin voltage exceeds Vscp(SUPIC) very
quickly after start-up and the HV start-up source switches to Inom(SUPHV).
During start-up and restart, the HV start-up source charges CSUPIC and regulates the
voltage on SUPIC using hysteretic control. The start level has a small amount of
hysteresis Vstart(hys)(SUPIC). The HV start-up source switches-off when VSUPIC exceeds the
start level Vstart(hvd)(SUPIC). Current consumption through the SUPHV pin is low
(Itko(SUPHV)).
Once start-up is complete and the HBC controller is operating, SUPIC is supplied from the
HBC transformer auxiliary winding. In operational state, the HV start-up source is
disabled.
7.3 Flow diagram
The operation of the SSL4120 can be divided into a number of states (see Figure 3). The
abbreviations used in Figure 3 are explained in Table 8.
SSL4120
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2.1 — 18 February 2014
© NXP B.V. 2014. All rights reserved.
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