TM1637 Ver la hoja de datos (PDF) - Unspecified

Número de pieza

componentes Descripción

Fabricante

TM1637

LED Drive Control Special Circuit

Unspecified 

LED Drive Control Special Circuit TM1637

Display register address

Stored data in the register is transferred to the TM1637 from outside elements by serial interface, with 6 bytes

units of address from C0H to C5H in correspondence with the LED lights connected with SEG pin and GRID pin on

the chip.LED data is displayed from low level to high level in respect of display address, and should be operated from

low level to high level in respect of data bytes.

xxHL（low four bits）

B0 B1 B2 B3

C0HL

C1HL

C2HL

C3HL

C4HL

C5HL

xxHU(high four bits)

B4 B5 B6 B7

C0HU

C1HU

C2HU

C3HU

C4HU

C5HU

GRID1

GRID2

GRID3

GRID4

GRID5

GRID6

Interface interpretation

Microprocessor data realize the communication with TM1637 by means of two–wire bus interface (Note: The

communication method is not equal to 12C bus protocol totally because there is no slave address). When data is input,

DIO signal should not change for high level CLK and DIO signal should change for low level CLK signal. When CLK

is a high level and DIO changes from high to low level, data input starts. When CLK is a high level and DIO changes

from low level to high level, data input ends.

TM1637 data transfer carries with answering signal ACK. For a right data transfer, an answering signal ACK is

generated inside the chip to lower the DIO pin at the failing edge of the 8th clock. DIO interface wire is released at the

end of the 9th clock.

1、 Command data transfer is as follows (Reading Key Data Timing)

123456789123456789

CLK

DIO

STAR

command

S0 S1 S2 K1 K2

END

The chip is

automatically

lowered at ACK

low level

The chip is

automatically

lowered at ACK

low level

Command: command to read the keys; Key information coding consists of S0, S1, S2, K1 and K2. SGn coding consists

of S0, S1, and S2. K1 and K2 are coding for K1 key and K2 key. The key should be read from low level to high level

and the clock frequency should be less than 250K.

©Titan Micro Electronics

V2.4

3

www.titanmec.com

Share Link: