MEC1310I-NU Ver la hoja de datos (PDF) - Microchip Technology
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MEC1310I-NU Datasheet PDF : 10 Pages
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MEC1310
BLOCK DIAGRAM
FIGURE 1:
MEC1310 BLOCK DIAGRAM
VCC1(5)
VCC2(2)
VSS(7)
nRESET_OUT
LAD [3:0]
LFRAME#
LRESET#
SYSTEM
RESET
LPC BUS
HOST CPU
INTERFACE
MEC1310 - 128 Pin, 64KB Executable SRAM
CONFIGURATION REGISTERS
POWER
MANAGEMENT
nEC_SCI
nSMI
SER_IRQ
CLKRUN#
PCI_CLK
INTERRUPTS
TXD
RXD
VCC1_RST#
PWRGD
RSMRST#
16C550A
COMPATIBLE
SERIAL PORT
POWER
Reset &
Control
32KHZ_INPUT
32K
Distrabu-tion
nEC_SCI
3x
ACPI
EMBEDDED
CONTROLLER
PM1
BLOCK
VCC0
AGND
VCC0
Resources
64 Bytes
Reg
PWR_FAIL
Reg
Note: This block diagram shows internal block
interfaces before pin multiplexing, and should not used
for pin count.
WDT
CONTROL, ADDRESS, DATA
8051
256B Direct
RAM
Accurate
Ring
Oscillator
MAILBOX REGISTERS
8051 SUB-BLOCK
EXTERNAL CONTROL
REGISTERS
1024B Boot ROM
Executable
SRAM
VCC2 Controlled
VCC1 Controlled
8051TX
8051RX
PECI
BC-Link Bus
Master Controller
Analog to Digital
Converter.
RPM-PWM
Pulse Width
Modulator Output
Fan Tachometer
PECI_DAT
PECI_VREF
BC_CLK
BC_DAT
BC_INT#
ADC[0:4]
TACH2PWM_IN
TACH2PWM_OUT
PWM[0:4]
FAN_TACH[1:2]
GENERAL OUT
PURPOSE I/O
INTERFACE I/O
OUT0, OUT1, OUT7 - OUT11
GPIO00 – GPIO47
GPIO[50:57]
LED DRIVER
nBAT_LED, nPWR_LED,
nFDD_LED, nDMS_LED
18 x 8
KEYBOARD
INTERFACE
PS/2 PORTS
ACCESS BUS
1
ACCESS BUS
2
ACCESS BUS
3
SPI
Interface
SPI
Switch
KSI[0:7]
KSO[0:17]
KBRST, A20M
KCLK, EMCLK, IMCLK, PS2CLK
KDAT, EMDAT, IMDAT, PS2DAT
AB1A_DATA, AB1A_CLK
AB1B_DATA, AB1B_CLK
AB2A_DATA , AB2A_CLK
AB2B_DATA , AB2B_CLK
AB3_DATA , AB3_CLK
HSTCLK, HSTCS0#
HSTDATAIN, HSTDATAOUT
FLCLK, FLCS0#
FLDATAIN, FLDATAOUT
DS00001768A-page 4
2014 Microchip Technology Inc.
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