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T8301

Internet Protocol Telephone Phone-On-A-Chip™ IP Solution DSP

Agere -> LSI Corporation 

Advance Data Sheet

December 2000

T8301 Internet Protocol Telephone

Phone-On-A-Chip IP Solution DSP

4 DSP1600 Core

The discussions in this section pertain to circuitry that is inside of the dotted outline in Figure 3. For additional

resources, please refer to the DSP1627 Digital Signal Processor Data Sheet.

The DSP1600 core includes a data arithmetic unit, memory addressing units, cache, and a control section. In com-

bination, these elements support a diverse instruction set for implementing users’ algorithms.

4.1 Bit Manipulation Unit (BMU)

The BMU provides extensive bit manipulation capabilities that increase the DSP1627’s efficiency in processing

data.

4.2 Timer

The DSP1627 core contains a programmable interrupt timer that can be configured to count over a wide range of

frequencies. This timer provides flexibility in timing events.

4.3 Clock PLL Control

The DSP1627 powers up with the input clock (CKI1/CKI2 in the T8301 IC) as the source for the processor clock.

An on-chip clock synthesizer (PLL) can also be used to generate the system clock for the DSP1627, which will run

at a frequency multiple of the input clock. The clock synthesizer is deselected and powered down on reset. For low-

power operation, an internally generated slow clock can be used to drive the DSP1627. If both the clock synthe-

sizer and the internally generated slow clock are selected, the slow clock will drive the DSP1627; however, the syn-

thesizer will continue to run.

The clock synthesizer and other programmable clock sources are discussed in the DSP1627 data sheet. The use

of these programmable clock sources for power management is also discussed in the DSP1627 data sheet. Board

designers should refer to the section on VDDA and VSSA connections in the data sheet for specific connection and

filtering requirements on the clock synthesizer power and ground leads.

CKI1

LOAD

CAPACITOR

12,288 kHz

CRYSTAL OSCILLATOR

TO PLL

÷768

16 kHz

TO CODECS

LOAD

CKI2

CAPACITOR

Note: The 12,288 KHz is required as shown. Variations from this crystal frequency will cause detrimental effects to speech quality.

Figure 4. Crystal Oscillator

Lucent Technologies Inc.

9

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