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T8301

Internet Protocol Telephone Phone-On-A-Chip™ IP Solution DSP

Agere -> LSI Corporation 

Advance Data Sheet

December 2000

T8301 Internet Protocol Telephone

Phone-On-A-Chip IP Solution DSP

3 Overview

The T8301 (DSP) interfaces with the T8302 (ARM) to form the basic building blocks for an internet protocol tele-

phone (IPT), residing on a local area network (LAN); see Figure 2.

At the heart of the T8301 integrated circuit is the Lucent Technologies Microelectronics Group DSP1627 digital sig-

nal processor core. The DSP1627’s high-performance (80 MIPS) and single-cycle multiply accumulate instruction

provide excellent support for execution of voice compression/decompression and echo cancellation algorithms.

The DSP1627 core and the analog audio circuitry included on the T8301 IC provide a low-cost silicon solution for

the IP exchange telephone’s audio requirements. A block diagram of the T8301 integrated circuit is shown in

Figure 3.

The DSP1627 core contains the DSP1600 core processor, bit manipulation unit (BMU), dual-port RAM (DPRAM),

instruction/coefficient ROM (IROM), bit I/O (BIO), serial I/O (SIO), timer, clock PLL control, vectored interrupts and

traps, power management, external memory interface (EMI) with wait-state control, and a JTAG interface with inte-

gral hardware development system support.

The DSP1627 peripherals communicate with the DSP1627 core through the (D-IDB bus), which is 16 bits wide.

The DSP1627 core’s Harvard architecture allows efficient memory utilization by supporting separate instruction

(XDB, XAB) and data (YDB, YAB) address spaces. The dual-port RAM (DPRAM) is connected to both address and

data buses XDB, YDB, XAB, and YAB, while the instruction ROM is only connected to the XDB and XAB memory

bus. The external memory interface provides a mechanism to access I/O devices and memories that are not part of

the core DSP1627 hardware.

For a complete description of the DSP1627 core and its peripherals, refer to the DSP1627 Digital Signal Processor

Data Sheet. A brief description of the functionality of the DSP1627 is provided in the following section. Where nec-

essary, comments are made which reflect differences between the operation of the DSP1627 and the T8301.

Please refer to the DSP1627 data sheet for further explanation.

X = LEAVE OPEN IF

UNUSED

12.288 MHz CLOCK

SOURCE

HANDSET

SPEAKER AND

MIC

SPEAKERPHONE

SPEAKER AND

MIC

HEADSET SPEAKER

OPTIONAL

EXTERNAL

SERIAL

CODEC

OPTIONAL

BIT

INPUT

OUTPUT

ATE ANALOG

TEST PINS

TEST MODE

SELECT PINS

CKI1

AOUTA

AINAN

SPKDRV1A

SPKDRV1B

AINCP

AINCN

SPKDRV2A

SPKDRV2B

CKI2 CKO

CK8KHZ

CK2MHZ

RESETN

INT0N

M_CS

I_CSN

DO1

DI1

IOCK

IOLD

SYNC

RWN

A0—A11

D0—D15

BIO0

BIO1

BIO2

BIO3

DSP

X_CSN

STCK

STO1

STI1

TMODEN0

TMODEN1

TMODEN2

TRSTN

TDO

TDI

TC

TMS

INT1N

OPTIONAL

CLOCK

RESOURCES

RESETN

DSP_INT0N

DSP_MCSN

DSP_ICSN

DSP_RWN

DSP_A0—DSP_A11

DSP_D0—DSP_D15

OPTIONAL

(MEMORY) DEVICE

ON 12K Y DATA

BUS

BOUNDARY

SCAN

AND/OR

JTAG

ARM

Figure 2. DSP/ARM Interface Block Diagram

Lucent Technologies Inc.

7

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