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TTSI1K16T3TL Ver la hoja de datos (PDF) - Agere -> LSI Corporation

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TTSI1K16T3TL
Agere
Agere -> LSI Corporation Agere
TTSI1K16T3TL Datasheet PDF : 64 Pages
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TTSI1K16T
1024-Channel, 16-Highway Time-Slot Interchanger
Preliminary Data Sheet
February 1999
Contents
Table of Contents
Page
Features .................................................................................................................................................................. 1
Applications ............................................................................................................................................................. 1
Description............................................................................................................................................................... 1
Functional Description ............................................................................................................................................. 5
Pin Information ........................................................................................................................................................ 7
Typical TSI Application .......................................................................................................................................... 13
Interchange Fabric................................................................................................................................................. 14
Small and Large TSIs ............................................................................................................................................ 15
Microprocessor Interface ....................................................................................................................................... 16
Asynchronous Mode (MM = 0)........................................................................................................................... 16
Synchronous Mode (MM = 1) ............................................................................................................................ 17
Highway Data Rate Selection................................................................................................................................ 18
Mixed-Highway Data Rates ................................................................................................................................... 19
TDM Highway Interface Timing ............................................................................................................................. 20
Virtual and Physical Frames .............................................................................................................................. 20
TDM Highway Alignment at Zero Offset ............................................................................................................ 21
TDM Highway Offsets............................................................................................................................................ 21
Reset Sequence .................................................................................................................................................... 22
Low-Latency and Frame-Integrity Modes .............................................................................................................. 23
Low Latency....................................................................................................................................................... 23
Frame Integrity................................................................................................................................................... 24
Test-Pattern Generation ........................................................................................................................................ 27
Test-Pattern Checking........................................................................................................................................... 27
Error Injection ........................................................................................................................................................ 28
Error Checking....................................................................................................................................................... 28
JTAG Boundary-Scan Specification ...................................................................................................................... 29
Principle of the Boundary Scan.......................................................................................................................... 29
Test Access Port Controller ............................................................................................................................... 30
Instruction Register ............................................................................................................................................ 32
Boundary-Scan Register.................................................................................................................................... 33
BYPASS Register .............................................................................................................................................. 33
IDCODE Register............................................................................................................................................... 33
3-State Procedures ............................................................................................................................................ 33
Register Architecture ............................................................................................................................................. 34
Configuration Register Architecture....................................................................................................................... 36
Transmit Highway 3-State Options .................................................................................................................... 49
Data Store Memory ............................................................................................................................................... 50
Connection Store Memory..................................................................................................................................... 50
Absolute Maximum Ratings................................................................................................................................... 53
Operating Conditions............................................................................................................................................. 53
Handling Precautions ............................................................................................................................................ 53
Electrical Characteristics ....................................................................................................................................... 54
Timing Characteristics ........................................................................................................................................... 54
Outline Diagram..................................................................................................................................................... 61
144-Pin TQFP .................................................................................................................................................... 61
Ordering Information.............................................................................................................................................. 62
DS99-177PDH Replaces DS98-290TIC to Incorporate the Following Updates .................................................... 62
2
Lucent Technologies Inc.

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