IHLP-1616AB-11(2008) Ver la hoja de datos (PDF) - Vishay Semiconductors
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IHLP-1616AB-11 Datasheet PDF : 3 Pages
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IHLP-1616AB-11
Vishay Dale
Low Profile, High Current Inductor
Manufactured under one or more of the following:
US Patents; 6,198,375/6,204,744/6,449,829/6,460,244.
Several foreign patents, and other patents pending.
STANDARD ELECTRICAL SPECIFICATIONS
Lo
INDUCTANCE
µH ± 20 %
at 100 kHz, 0.25 V, 0 A
DCR mΩ
TYPICAL
25 °C
DCR mΩ
MAX
25 °C
HEAT
RATING
CURRENT
DC AMPS3
TYPICAL
SATURATION
CURRENT
DC AMPS4
TYPICAL
0.047
3
3.3
15.0
15.0
0.10
5
5.5
12.0
12.0
0.22
9.5
10.5
9.5
9.5
0.47
19
21
6.0
6.0
1.0
43
47
4.2
4.5
1.2
50
55
3.75
3.75
1.5
68
75
3.25
3.25
2.2
90
100
2.75
3.00
NOTES:
1. All test data is referenced to 25 °C ambient
2. Operating Temperature Range - 55 °C to + 125 °C
3. DC current (A) that will cause an approximate ΔT of 40 °C
4. DC current (A) that will cause Lo to drop approximately 20 %
5. The part temperature (ambient + temp rise) should not exceed
125 °C under worst case operating conditions. Circuit design,
component placement, PWB trace size and thickness, airflow
and other cooling provisions all affect the part temperature. Part
temperature should be verified in the end application.
FEATURES
• Shielded construction
• Frequency range up to 1.0 MHz
• Lowest DCR/µH, in this package size
• Handles high transient current spikes without
saturation
RoHS
COMPLIANT
• Ultra low buzz noise, due to composite construction
• 100 % lead (Pb)-free and RoHS compliant
APPLICATIONS
• PDA/Notebook/Desktop/Server applications
• High current POL converters
• Low profile, high current power supplies
• Battery powered devices
• DC/DC converters in distributed power systems
• DC/DC converter for Field Programmable Gate Array (FPGA)
DIMENSIONS in inches [millimeters]
0.160 ± 0.010
[4.06 ± 0.254]
0.080 ± 0.002
[2.0 ± 0.05] Typical Pad Layout
0.195
[4.95]
0.047
[1.20]
Max.
0.175 ± 0.010
[4.45 ± 0.254]
0.090
[2.30]
0.065
[1.65]
0.030 ± 0.012
[0.76 ± 0.30]
DESCRIPTION
IHLP-1616AB-11
MODEL
2.2 µH
INDUCTANCE
VALUE
GLOBAL PART NUMBER
± 20 %
INDUCTANCE
TOLERANCE
ER
PACKAGE
CODE
e3
JEDEC LEAD (Pb)-FREE
STANDARD
I
H
L
P
1
6
1
6
A
BE
R
2
R
2
M
1
1
MODEL
SIZE
PACKAGE
CODE
INDUCTANCE INDUCTANCE SERIES
VALUE
TOLERANCE
www.vishay.com
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For technical questions, contact: magnetics@vishay.com
Document Number: 34194
Revision: 21-Jan-08
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