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TMC5062 Ver la hoja de datos (PDF) - Unspecified

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TMC5062 Datasheet PDF : 92 Pages
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TMC5062 DATASHEET (Rev. 1.10 / 2016-APR-28)
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In addition to these performance enhancements, TRINAMIC motor drivers also offer safeguards to
detect and protect against shorted outputs, output open-circuit, overtemperature, and undervoltage
conditions for enhancing safety and recovery from equipment malfunctions.
1.2 Control Interfaces
The TMC5062 supports both, an SPI and a UART based single wire interface with CRC checking.
Selection of the actual interface is done via the configuration pin SW_SEL, which can be hardwired to
GND or VCC_IO depending on the desired interface.
1.2.1 SPI Interface
The SPI interface is a bit-serial interface synchronous to a bus clock. For every bit sent from the bus
master to the bus slave, another bit is sent simultaneously from the slave to the master.
Communication between an SPI master and the TMC5062 slave always consists of sending one 40-bit
command word and receiving one 40-bit status word.
The SPI command rate typically is a few commands per complete motor motion.
1.2.2 UART Interface
The single wire interface allows differential operation similar to RS485 (using SWIOP and SWION) or
single wire interfacing (leaving open SWION). It can be driven by any standard UART. No baud rate
configuration is required.
1.3 Software
From a software point of view the TMC5062 is a peripheral with a number of control and status
registers. Most of them can either be written only or read only, some of the registers allow both read
and write access. In case read-modify-write access is desired for a write only register, a shadow
register can be realized in master software.
www.trinamic.com

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