LR645(2001) Ver la hoja de datos (PDF) - Supertex Inc
Número de pieza
componentes Descripción
Fabricante
LR645 Datasheet PDF : 4 Pages
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Thermal Characteristics
Package
SO-8
Power Dissipation
@ TA = 25°C
0.31W
θ jc
°C/W
156
TO-92
0.74W
125
TO-220
1.8W
8.3
TO-243AA
1.6W
15
† Mounted on FR5 board, 25mm x 25mm x 1.57mm.
Significant P increase possible on ceramic substrate.
D
θ ja
°C/W
400†
170
70
78†
Block Diagram
VIN
Trim
–
+
LR645
VOUT
Gate
GND
Electrical Characteristics
Test conditions unless otherwise specified: TA = 25°C; VIN = 15 to 450V, COUT = 0.01µF
Symbol
Parameter
Min Typ Max Unit
VOUT
VOUT
∆VOUT
∆VOUT
VIN
IINQ
IOFF
IAUX
∆VOUT/∆VIN
en
IPEAK
VAUX
Output Voltage
Output Voltage over Temperature 1
Line Regulation
Load Regulation
Operating Input Voltage Range
Input Quiescent Current
VIN Off-State Leakage Current
Input Current to VOUT
Ripple Rejection Ratio 1
Noise voltage 1
Output Peak Current 2
External Voltage Applied to VOUT
9.3 10 10.7
V
9.0 10 11.5
V
40
200
mV
150 400
mV
15
450
V
50
150
µA
0.1
10
µA
200
µA
50 60
dB
25
µV
30
mA
13.2
V
Conditions
No load
TJ = -40°C ≤ to + 125°C, No load
VIN=15V to 400V, No load
VIN=50V, IOUT=0 to 3.0mA
No Load
VAUX≥VOUT+1V applied to VOUT pin
VAUX≥VOUT+1V applied to VOUT pin
120Hz, No Load
0.01 to 100KHz
COUT = 10µF, VIN = 400V
8-pin, adjustable output voltage version only.
Test conditions unless otherwise specified: TA = 25°C; VIN = 15 to 450V, COUT = 0.01µF
Symbol
Parameter
Min Typ Max Unit
VOUT
Output Voltage Trim Range1
∆VOUT
Load Regulation at 8V trim1
∆VOUT
Load Regulation at 12V trim1
Notes:
1. Guaranteed by design, not tested in production.
2. Pulse test duration < 1msec, Duty cycle < 2%
8
12
V
200 400
mV
100 400
mV
Conditions
No load
VIN=15V, IOUT=0 to 1.0mA
VIN=50V, IOUT=0 to 3.0mA
2
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