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MAX5091BASA

28V, 100mA, Low-Quiescent-Current LDO with Reset and Power-Fail Input/Output

Maxim Integrated 

MAX5091

28V, 100mA, Low-Quiescent-Current LDO

with Reset and Power-Fail Input/Output

Typical Operating Characteristics (continued)

(Typical Application Circuit, VS = +14V, CIN = 10μF, COUT = 10μF, VSI = 0V, VEN = +2.4V, VOUT = +5V, TA = +25°C, unless

otherwise noted.)

VOUT STARTUP RESPONSE

MAX5091 toc21

IOUT = 10mA VOUT

2V/div

0V

0V

ENABLE RESPONSE

MAX5091 toc22

IOUT = 100mA

VOUT

5V/div

SHUTDOWN RESPONSE

MAX5091 toc23

IOUT = 100mA

VOUT

2V/div

0V

VS

5V/div

EN

0V

0V

5V/div

10ms/div

200µs/div

200µs/div

EN

2V/div

0V

Pin Description

PIN

NAME

FUNCTION

1

VS

Regulator Input. Operating supply range is from +5V to +28V and withstands 40V transients. Bypass

VS to GND with a 10µF capacitor.

2

SI

Voltage Sense/Power-Fail Comparator Input. SI is the noninverting input of an uncommitted comparator. SO

asserts low if VSI drops below the reference level, VST.

3

EN

Enable Input. Leave unconnected (or pull EN high) to turn on the regulator. Pull EN low to place the device in

shutdown mode. EN is internally pulled up to 3.6V.

Reset Timeout Delay Capacitor Connection. Connect a capacitor from CT to GND to program the reset timeout

4

CT period/reset pulse delay. During regulation, CT is pulled up to VOUT. CT is pulled low during reset, when EN is

low, or when in thermal shutdown.

5

GND

Ground. Bypass the input and output capacitors to the GND plane. Solder to large pads or the circuit-board

ground plane to maximize thermal dissipation.

Active-Low Reset Output. Pull up externally to VOUT. Open-drain RES goes low when VOUT is below the reset

6

RES threshold. Once output voltage is in regulation, RES goes high after the programmed reset timeout period is

over. RES is low when EN is low or in thermal shutdown.

Voltage Sense/Power-Fail Comparator Output. Pull up externally to VOUT. Open-drain SO asserts

7

SO low when VSI drops below the reference level, VST. SO also asserts low when EN is low or in thermal

shutdown.

8

VOUT

Regulator Output. Fixed at +5V (MAX5091A) or +3.3V (MAX5091B). Bypass with a 10µF ceramic capacitor to

GND.

EP

EP

Exposed Paddle. EP is internally connected to GND. Connect EP to GND to provide a low thermal-resistance

path from the IC junction to the PC board. Do not use as the only electrical connection to GND.

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