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MAX3542EVKIT

MAX3541/MAX3542 Evaluation Kits

Maxim Integrated 

MAX3541/MAX3542 Evaluation Kits

7) Install and run the MAX3541/MAX3542 control

software. Software is available for download at

www.maxim-ic.com/evkitssoftware.

8) Load the default register settings from the control

software by clicking Edit: Load Defaults.

9) Connect the SMA connector labeled IF_OUT on

the evaluation board to a spectrum analyzer or to

an oscilloscope.

10) Enable the RF signal generator’s output.

11) Set the center frequency to the IF frequency set on

the control software. Check the output.

Gain Adjustment Calculations

Add an additional 6dB to the voltage gain to account

for the 2:1 transformer on the output. Add another

3.96dB to the voltage gain to account for the minimum

loss pad (R10 and R11) on the input. When measuring

noise figure, account for 5.7dB power loss of the mini-

mum loss pad.

A 36MHz IF anti-aliasing filter is provided on the EV kits

(C9, C12, C21, C25, C28, C29, C31, C35, L3, L9, L10,

and L11). Anti-aliasing filter requirements vary depend-

ing on applications; users should consult their demodu-

lator vendors for more specific information.

Layout Considerations

The MAX3541/MAX3542 EV kits serve as a guide for

PCB layout. Keep RF signal lines as short as possible

to minimize losses and radiation. Use controlled imped-

ance on all high-frequency traces. The exposed pad

must be soldered evenly to the board’s ground plane

for proper operation. Use abundant vias beneath the

exposed pad for maximum heat dissipation. Use abun-

dant ground vias between RF traces to minimize unde-

sired coupling.

To minimize coupling between different sections of the

IC, the ideal power-supply layout is a star configuration,

which has a large decoupling capacitor at the central

VCC node. The VCC traces branch out from this node,

with each trace going to separate VCC pins of the

MAX3541/MAX3542. Each VCC pin must have a bypass

capacitor with low impedance to ground at the frequen-

cy of interest. Do not share ground vias among multiple

connections to the PCB ground plane.

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