RH119 Ver la hoja de datos (PDF) - Linear Technology
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RH119 Datasheet PDF : 4 Pages
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RH119
ELECTRICAL CHARACTERISTICS (Continued)
Note 1: For supply voltages less than ± 15V, the maximum input voltage is
equal to the supply voltage.
Note 2: Unless otherwise noted, supply voltage equals ± 15V and TA =
25°C. The GND pin is grounded. Note that the maximum voltage allowed
between the GND pin and V + is 18V. Do not tie the GND pin to V – when
the power supply voltage exceeds ± 9V. The offset voltage, offset current
and bias current specifications apply for all supply voltages between ± 15V
and 5V unless otherwise specified.
Note 3: The offset voltages and currents given are the maximum values
required to drive the output within 1V of either supply with a 1mA load––
thus, these parameters define an error band and take into account the
worst-case effects of voltage gain and input impedance.
Note 4: Response time specified for a 100mV input step with 5mV
overdrive.
Note 5: VS = ± 15V, VCM = 0V, TA = 25°C unless otherwise noted.
TABLE 2: ELECTRICAL TEST REQUIRE E TS
MIL-STD-883 TEST REQUIREMENTS
Final Electrical Test Requirements (Method 5004)
Group A Test Requirements (Method 5005)
Group C and D End Point Electrical Parameters
(Method 5005)
* PDA Applies to subgroup 1. See PDA Test Notes.
SUBGROUP
1*,2,3,4
1,2,3,4
1
PDA Test Notes
The PDA is specified as 5% based on failures from group A, subgroup 1,
tests after cooldown as the final electrical test in accordance with method
5004 of MIL-STD-883 Class B. The verified failures (including Delta
parameters) of group A, subgroup 1, after burn-in divided by the total
number of devices submitted for burn-in in that lot shall be used to
determine the percent for the lot.
Linear Technology Corporation reserves the right to test to tighter limits
than those given.
TOTAL DOSE BIAS CIRCUIT
15V
10k
100Ω
10k
–15V
–
V+
10k
10k
SIDE 1
OUT1
+
GND1
–
SIDE 2
OUT2
+
GND2
V–
RH119 TDBC
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
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