LF2301JC55 Ver la hoja de datos (PDF) - LOGIC Devices Incorporated

Número de pieza

componentes Descripción

Fabricante

LF2301JC55

Image Resampling Sequencer

LOGIC Devices Incorporated 

DEVICES INCORPORATED

LF2301

Image Resampling Sequencer

impedance state. Users may then

access external memory. Normal

operation resumes on the next clock

cycle after NOOP goes HIGH. NOOP

is latched on the rising edge of CLK.

OETA — Target Memory Output Enable

When OETA is HIGH, UWRI and U11-0

are forced to the high-impedance

state. When OETA is LOW, UWRI

and U11-0 are enabled on the next

clock cycle. OETA is latched on the

rising edge of CLK.

Flags

CZERO — Coefficient Zero

If in a row device x<0,

XMIN≤x≤XMAX, or x≥4096, the

registered CZERO flag goes HIGH . If

0≤x<XMIN or XMAX<x<4096, CZERO

goes LOW. In an ITS, when the source

address falls outside a rectangle with

vertices (XMIN, YMIN), (XMAX,

YMIN), (XMIN, YMAX), and (XMAX,

YMAX), the logical AND of the

CZERO flags from the row and

column of the LF2301s will go LOW

representing an invalid address.

END — End of Row/Frame

When two LF2301s are used to form

an ITS, the END flag on each device

is connected to INTER on the other

device. The END flag from the row

device indicates an “end of line” to the

column device. The END flag from

the column device indicates a “bottom

of frame” to the row device, forcing a

reset of the address counter.

When Mode is set to “00” or “10”

END goes HIGH on the row device

for (K+1) x (K+1) clock cycles

starting[2 x (K+1) x (K+1)] + 1 clock

cycles before the last X address of a

row. END goes HIGH on the column

device for (K+1)3 x (UMAX-UMIN)

clock cycles starting at (K+1)3 x

(UMAX-UMIN) + 1 clock cycles before

the last X address of a frame.

When Mode is set to “01” or “11”

END goes HIGH on the row device

for K+1 clock cycles starting at (K+1) +

2 clock cycles before the last X address

of a row. END goes HIGH on the

column device for (K+1) x (K+1)

clock cycles starting at [(K+1) x (K+1)] +

1 clock cycles before the last X address

of a frame.

DONE — End of Transform

In a two LF2301 system, after the last

walk of the last row of an image, the

registered DONE flag goes HIGH

indicating the end of the transform.

DONE goes HIGH one clock cycle

before the last X address of a frame. If

AIN is HIGH, DONE will remain

HIGH for one clock cycle. If AIN is

LOW, DONE will remain HIGH until

a new transform begins.

Transformation Control Parameters

XMIN, XMAX, YMIN, YMAX

XMIN, XMAX, YMIN, YMAX define

the valid area in the source image

from which pixels may be read. The

CZERO flags will denote a valid

memory read whenever the LF2301s

generate an (x,y) address within this

boundary.

UMIN, UMAX, VMIN, VMAX

UMIN, UMAX, VMIN, VMAX define

the area in the destination image into

which pixels will be written.

(UMIN, VMIN) is the top left corner

and (UMAX + 1, VMAX) is the bottom

right corner. The following conditions

must be met: UMAX>UMIN and

VMAX>VMIN.

x0, y0

x0, y0 determine what the first pixel read

out of the source image will be at the

beginning of an image transformation.

x0, y0 will be the upper left corner of the

original image in non-inverting, non-

reversing applications.

dx/du

dx/du is the displacement along the

x axis corresponding to a one-pixel

movement along the u axis.

dx/dv

dx/dv is the displacement along the

x axis corresponding to each one-pixel

movement along the v axis.

dy/du

dy/du is the displacement along the

y axis corresponding to each one-pixel

movement along the u axis.

dy/dv

dy/dv is the displacement along the

y axis corresponding to each one-pixel

movement along the v axis.

d2x/du2

d2x/du2 determines the rate of change

of dx/du with each step along a line

in the output image.

d2x/dv2

d2x/dv2 determines the rate of change

of dx/dv with each step down a

column in the output image.

d2y/du2

d2y/du2 determines the rate of change

of dy/du with each step along a line

in the output image.

d2y/dv2

d2y/dv2 determines the rate of change

of dy/dv with each step down a

column in the output image.

d2x/dudv

d2x/dudv determines the rate of

change of dx/du while moving

vertically through the output image.

d2x/dudv also determines the rate of

change of dx/dv while moving

horizontally through the output

image.

d2y/dudv

d2y/dudv determines the rate of

change of dy/dv while moving

horizontally through the output

image. d2y/dudv also determines the

rate of change of dy/du while

moving vertically through the output

image.

Video Imaging Products

2-3

08/16/2000–LDS.2301-H

Share Link: