FAN53601(2012) Ver la hoja de datos (PDF) - Fairchild Semiconductor
Número de pieza
componentes Descripción
Fabricante
FAN53601 Datasheet PDF : 14 Pages
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Pin Configurations
Figure 2. Bumps Facing Down
Figure 3. Bumps Facing Up
Pin Definitions
Pin #
A1
B1
C1
C2
B2
A2
Name
Description
MODE
SW
FB
GND
EN
VIN
MODE. Logic 1 on this pin forces the IC to stay in PWM Mode. A logic 0 allows the IC to
automatically switch to PFM during light loads. The regulator also synchronizes its switching
frequency to four times the frequency provided on this pin. Do not leave this pin floating.
Switching Node. Connect to output inductor.
Feedback / VOUT. Connect to output voltage.
Ground. Power and IC ground. All signals are referenced to this pin.
Enable. The device is in Shutdown Mode when voltage to this pin is < 0.4 V and enabled when
> 1.2 V. Do not leave this pin floating.
Input Voltage. Connect to input power source.
© 2010 Fairchild Semiconductor Corporation
FAN53601 / FAN53611 • Rev. 1.0.1
2
www.fairchildsemi.com
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