ML4832CS Ver la hoja de datos (PDF) - Micro Linear Corporation

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ML4832CS

Electronic Dimming Ballast Controller

Micro Linear Corporation 

ML4832

FUNCTIONAL DESCRIPTION (Continued)

The magnitude of the offset voltage that will appear at

the input is given by VOS = io/gm. For an io of 1mA and a

gm of 0.05 µmhos the input referred offset will be 20mV.

Capacitor C1 as shown in Figure 2 is used to block the

DC current to minimize the adverse effect of offsets.

Slew rate enhancement is incorporated into all of the

operational transconductance amplifiers in the ML4832.

This improves the recovery of the circuit in response to

power up and transient conditions. The response to large

signals will be somewhat non-linear as the

transconductance amplifiers change from their low to

high transconductance mode. This is illustrated in

Figure 4.

BALLAST OUTPUT SECTION

The IC controls output power to the lamps via frequency

modulation with non-overlapping conduction. This

means that both ballast output drivers will be low during

the discharging time tDIS of the oscillator capacitor CT.

OSCILLATOR

The VCO frequency ranges are controlled by the output

of the LFB amplifier. As lamp current decreases, LFB

OUT rises in voltage, causing the CT charging current to

decrease, thereby causing the oscillator frequency to

decrease. Since the ballast output network attenuates

high frequencies, the power to the lamp will be

increased.

The oscillator frequency is determined by the following

equations:

FOSC

=

1

tCHG +

tDIS

(3)

and

  tCHG = RTCT In

VREF + ICH RT − VTL

VREF + ICH RT − VTH

(4)

The oscillator’s minimum frequency is set when ICH = 0

where:

FOSC

≅

1

0.51× RTCT

(5)

This assumes that tCHG >> tDIS.

When LFB OUT is high, ICH = 0 and the minimum

frequency occurs. The charging current varies according to

two control inputs to the oscillator:

1. The output of the preheat timer

2. The voltage at LFB OUT

In preheat condition, charging current is fixed at

ICHG(PREHEAT)

=

2.5

RSET

(6)

VREF

17

VREF

RT

ICHG

CONTROL

RT/CT

8

CT

5.5mA

+

1.25/3.75 –

CLOCK

tDIS

VTH = 3.75V

CT

VTL = 1.25V

Figure 5. Oscillator Block Diagram and Timing

8

tCHG

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