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ML4832CS Ver la hoja de datos (PDF) - Micro Linear Corporation

Número de pieza
componentes Descripción
Fabricante
ML4832CS
Micro-Linear
Micro Linear Corporation Micro-Linear
ML4832CS Datasheet PDF : 15 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
FUNCTIONAL DESCRIPTION (Continued)
AVERAGE CURRENT AND OUTPUT VOLTAGE
REGULATION
The PWM regulator in the PFC control section will act to
offset the positive voltage caused by the multiplier output
by producing an offsetting negative voltage on the current
sense resistor at IA+. A cycle-by-cycle current limit is
included to protect the MOSFET from high speed current
transients. When the voltage at IA+ goes negative by more
than 1V, the PWM cycle is terminated.
For more information on compensating the average
current and boost voltage error amplifier loops, see
ML4821 data sheet.
OVERVOLTAGE PROTECTION AND INHIBIT
The OVP pin serves to protect the power circuit from
being subjected to excessive voltages if the load should
change suddenly (lamp removal). A divider from the high
voltage DC bus sets the OVP trip level. When the voltage
on EA–/OVP exceeds 2.75V, the PFC transistors are
inhibited. The ballast section will continue to operate.
ML4832
TRANSCONDUCTANCE AMPLIFIERS
The PFC voltage feedback, PFC current sense, and the
loop current amplifiers are all implemented as operational
transconductance amplifiers. They are designed to have
low small signal forward transconductance such that a
large value of load resistor (R1) and a low value ceramic
capacitor (<1µF) can be used for AC coupling (C1) in the
frequency compensation network. The compensation
network shown in Figure 2 will introduce a zero and a
pole at:
fZ
=
2π
1
R1C1
fP
=
2π
1
R1C2
(2)
Figure 3 shows the output configuration for the operational
transconductance amplifiers.
A DC path to ground or VCC at the output of the
transconductance amplifiers will introduce an offset error.
18
2.5V
+
R1
C2
C1
Figure 2. Compensation Network
CURRENT
MIRROR
IN
OUT
IQ + gmVIN
2
IQ – gmVIN
2
io = gmVIN
IN
OUT
CURRENT
MIRROR
Figure 3. Output Configuration
iO
0
Linear Slope Region
VIN Differential
Figure 4. Transconductance Amplifier Characteristics
7

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