SPT7852 Ver la hoja de datos (PDF) - Signal Processing Technologies
Número de pieza
componentes Descripción
Fabricante
SPT7852 Datasheet PDF : 11 Pages
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Figure 1 –Typical Interface Circuit
+A5
+A5 3-st EN
Ref In
(+4 V)
VIN1
VIN2
Clock
VRHF
VRHS
MSBINV Reset
EN
Digital 11
Output A
VRLS
VRLF
VCAL
VINA
VINB
SPT7852
DAV
Digital 11
Output B
CLK
AVDD DVDD
GND
OVDD
.1 µF .1 µF
FB
*
4.7 µF 4.7 µF
FB
*
+A5
Interfacing
Logic
3.3 V/5 V
1. Place the ferrite bead (*) as close to the ADC as possible.
2. Place 0.1 µF decoupling capacitors as close to the ADC as possible.
3. All capacitors are 0.1 µF surface-mount unless otherwise specified.
4. All analog input pins (references, analog input, clock input) must
be protected. (See absolute maximum ratings.)
TYPICAL INTERFACE CIRCUIT
Very few external components are required to achieve the
stated device performance. Figure 1 shows the typical inter-
face requirements when using the SPT7852 in normal
circuit operation. The following sections provide descrip-
tions of the major functions and outline critical performance
criteria to consider for achieving the optimal device perfor-
mance.
POWER SUPPLIES AND GROUNDING
SPT suggests that both the digital and the analog supply
voltages on the SPT7852 be derived from a single analog
supply as shown in figure 1. A separate digital supply must
be used for all interface circuitry. SPT suggests using this
power supply configuration to prevent a possible latch-up
condition on powerup.
SPT
4
SPT7852
1/12/00
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