MB88345PF Ver la hoja de datos (PDF) - Fujitsu

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Fabricante

MB88345PF

D/A Converter for Digital Tuning (24-channel, 8-bit, on-chip OP amp)

Fujitsu 

MB88345

s PIN ASSIGNMENT

(TOP VIEW)

LD

CLK

DI

GND

VSS

AO1

AO2

AO3

24 23 22 21 20 19 18 17

25

16

26

15

27

14

28

13

29

12

30

11

31

10

32

INDEX

9

1 2 3 45 6 7 8

AO17

AO16

AO15

VCC

VDD

AO14

AO13

AO12

(FPT-32P-M21)

s PIN DESCRIPTION

Pin No. Pin name I/O

Description

27

DI*

I Serial data input pin. This pin inputs serial data with a data length of 14 bits.

24

DO

O This pin outputs the MSB data in the 14-bit shift register.

26

CLK*

I

Shift clock input pin. The input signal from the DI pin enters the 14-bit shift

register at the rising edge of the shift clock pulse.

25

LD*

I

When the LD pin inputs the High-level signal, shift register value is loaded to

the decoder and the D/A output register.

30 to 32 AO1 to AO3

1 to 11 AO4 to AO14 O 8-bit D/A output with OP-amp.

14 to 23 AO15 to AO24

13

VCC

 MCU interface and OP-amp power-supply pin

28

GND

 MCU interface and OP-amp GND pin

12

VDD

 D/A converter power-supply pin

29

VSS

 D/A converter GND pin

* : DI, CLK, LD pins should be fixed with “Low”level while no data are transferred.

2

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