ML4812CQX Ver la hoja de datos (PDF) - Fairchild Semiconductor
Número de pieza
componentes Descripción
Fabricante
ML4812CQX Datasheet PDF : 17 Pages
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ML4812
Pin Configuration
ML4812
16-Pin PDIP (P16)
ISENSE 1
GM OUT 2
EA OUT 3
EA– 4
OVP 5
ISINE 6
RAMP COMP 7
RT 8
16 CT
15 GND
14 VREF
13 VCC
12 OUT
11 PWR GND
10 SHDN
9 CLOCK
Top View
PRODUCT SPECIFICATION
ML4812
20-Pin PLCC (Q20)
EA OUT
EA–
NC
OVP
ISINE
3 2 1 20 19
4
18 VREF
5
17 VCC
6
16 NC
7
15 OUT
8
14 PWR GND
9 10 11 12 13
Top View
Pin Description
Number
1
Name
ISENSE
2
GM OUT
3
EA OUT
4
EA–
5
OVP
6
ISINE
7
RAMP
COMP
8
RT
9
CLOCK
10 SHDN
11 PWR
GND
12 OUT
13
VCC
14
VREF
15 GND
16 CT
Function
Input from the current sense transformer to the non-inverting input of the PWM
comparator.
Output of gain modulator. A resistor to ground on this pin converts the current to a
voltage. This pin is clamped to 5V and tied to the inverting input of the PWM comparator.
Output of error amplifier.
Inverting input to error amplifier.
Input to over voltage comparator.
Current gain modulator input.
Buffered output from the oscillator ramp (CT). A resistor to ground sets the current which
is internally subtracted from the product of ISINE and IEA in the gain modulator.
Oscillator timing resistor pin. A 5V source sets a current in the external resistor which is
mirrored to charge CT.
Digital clock output.
A TTL compatible low level on this pin turns off the output.
Return for the high current totem pole output.
High current totem pole output.
Positive Supply for the IC.
Buffered output for the 5V voltage reference.
Analog signal ground.
Timing capacitor for the oscillator.
2
REV. 1.0.4 5/31/01
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