UDA1350ATS Ver la hoja de datos (PDF) - Philips Electronics

Número de pieza

componentes Descripción

Fabricante

UDA1350ATS

IEC 958 audio DAC

Philips Electronics 

Philips Semiconductors

IEC 958 audio DAC

Preliminary specification

UDA1350ATS

The extracted key parameters are:

• Pre-emphasis

• Audio sample frequency

• Two-channel PCM indicator

• Clock accuracy.

Both the lock indicator and the key channel status bits are

accessible via the L3 interface.

The UDA1350ATS supports the following sample

frequencies and data bit rates:

fs = 32.0 kHz, resulting in a data rate of 2.048 Mbits/s

fs = 44.1 kHz, resulting in a data rate of 2.8224 Mbits/s

fs = 48.0 kHz, resulting in a data rate of 3.072 Mbits/s.

The UDA1350ATS supports timing level I, II and III as

specified by the IEC 958 standard.

8.4.2 AUDIO FEATURE PROCESSOR

The audio feature processor automatically provides

de-emphasis for the IEC 958 data stream in the static pin

control mode and default mute at start-up in the L3 control

mode.

When used in the L3 control mode it provides the following

additional features:

• Volume control using 6 bits

• Bass boost control using 4 bits

• Treble control using 2 bits

• Mode selection of the sound processing bass boost and

treble filters: flat, minimum and maximum

• Soft mute control with raised cosine roll-off

• De-emphasis selection of the incoming data stream for

fs = 32.0, 44.1 and 48.0 kHz.

8.4.4 NOISE SHAPER

The third-order noise shaper operates at 128fs. It shifts

in-band quantization noise to frequencies well above the

audio band. This noise shaping technique enables high

signal-to-noise ratios to be achieved. The noise shaper

output is converted into an analog signal using a filter

stream digital-to-analog converter.

8.4.5 FILTER STREAM DAC

The Filter Stream DAC (FSDAC) is a semi-digital

reconstruction filter that converts the 1-bit data stream of

the noise shaper to an analog output voltage. The filter

coefficients are implemented as current sources and are

summed at virtual ground of the output operational

amplifier. In this way very high signal-to-noise

performance and low clock jitter sensitivity is achieved. A

post filter is not needed due to the inherent filter function of

the DAC. On-board amplifiers convert the FSDAC output

current to an output voltage signal capable of driving a line

output.

The output voltage of the FSDAC is scaled proportionally

with the power supply voltage.

8.5 Control

The UDA1350ATS can be controlled by means of static

pins or via the L3 interface. For optimum use of the

features of the UDA1350ATS the L3 control mode is

recommended since only basic functions are available in

the static pin control mode.

It should be noted that the static pin control mode and

L3 control mode are mutual exclusive. In the static pin

control mode pins L3MODE and L3DATA are used to

select the format for the data output and input interface.

8.4.3 INTERPOLATOR

The UDA1350ATS includes an on-board interpolating filter

which converts the incoming data stream from 1fs to 128fs

by cascading a recursive filter and a FIR filter.

Table 2 Interpolator characteristics

PARAMETER

Pass-band ripple

Stop band

Dynamic range

DC gain

CONDITIONS

0 to 0.45fs

>0.65fs

0 to 0.45fs

−

VALUE (dB)

±0.03

−50

115

−3.5

2000 Mar 29

9

Share Link: