LTC1642IGN Ver la hoja de datos (PDF) - Linear Technology

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LTC1642IGN

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Linear Technology 

LTC1642

APPLICATIO S I FOR ATIO

The undervoltage monitor behaves differently if FB is

above its threshold when the GATE begins ramping:

RESET goes high as soon as the GATE ramp begins.

RESET goes low immediately if VCC falls below the chip’s

2.5V internal undervoltage lockout threshold.

To disable the undervoltage monitor, tie FB to REF and

ground RESET.

Reference

The LTC1642’s internal voltage reference is buffered and

brought out to the REF pin. The buffer amplifier should be

compensated with a capacitor connected between REF

and ground. If no DC current is drawn from REF, 0.1µF

ensures an adequate phase margin, but the minimum

compensation increases if REF sources a substantial DC

current, as shown in Figure 14.

R2

Q1

VIN

0.015Ω

FDS6630A

12V

2.5A

16

15

VCC SENSE

R3

100Ω

4

ON

14

GATE

R4

LTC1642

330Ω

C2

0.047µF

7

FB

5

RESET

+

VOUT

CLOAD

R9

95.3k

1%

R8

12.4k

1%

D1

1N4705

18V

RST TMR GND

3

8

C1

0.33µF

1642 F12

ALL RESISTORS ±5% UNLESS NOTED.

FB COMPARATOR TRIPS AT VOUT = 10.7V

Figure 12. Undervoltage Monitoring Circuitry

VIN

20V/DIV

VRSTTMR

1V/DIV

VRESET

10V/DIV

t1

t2 t3

t4

t5

250ms/DIV

1642 F09

Figure 13. Supply Monitor Waveforms

10.0

4.0

2.0

1.0

0.4

0.2

0.1

14

100µA

1mA

REFERENCE CURRENT

10mA

1642 F14

Figure 14. Minimum REF Compensation vs REF Current

1642fb

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