M50LPW041K Ver la hoja de datos (PDF) - STMicroelectronics
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M50LPW041K Datasheet PDF : 37 Pages
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M50LPW041
4 Mbit (512Kb x8, Uniform Block)
3V Supply Low Pin Count Flash Memory
PRELIMINARY DATA
s SUPPLY VOLTAGE
– VCC = 3V to 3.6V for Program, Erase and
Read Operations
– VPP = 12V for Fast Program and Fast Erase
s LOW PIN COUNT (LPC)
– Standard Interface for embedded operation
with PC Chipsets that are without automap-
ping memory features
s ADDRESS/ADDRESS MULTIPLEXED
– A/A Mux Interface for programming equip-
ment compatibility
s LOW PIN COUNT (LPC) HARDWARE
INTERFACE MODE
– 5 Signal Communication Interface supporting
Read and Write Operations
– Hardware Write Protect Pins for Block Pro-
tection
– Register Based Read and Write Protection
– 5 Additional General Purpose Inputs for plat-
form design flexibility
– Synchronized with 33MHz PCI clock
s BYTE PROGRAMMING TIME
– Single Byte Mode: 10µs (typical)
– Quadruple Byte Mode: 2.5µs (typical)
s 8 UNIFORM 64 Kbyte MEMORY BLOCKS
s PROGRAM/ERASE CONTROLLER
– Embedded Byte Program and Block/Chip
Erase algorithms
– Status Register Bits
s PROGRAM and ERASE SUSPEND
– Read other Blocks during Program/Erase
Suspend
– Program other Blocks during Erase Suspend
s FOR USE in PC BIOS APPLICATIONS
s ELECTRONIC SIGNATURE
– Manufacturer Code: 20h
– Device Code: 3Ch
PLCC32 (K)
TSOP40 (N)
10 x 20mm
Figure 1. Logic Diagram (LPC Interface)
VCC VPP
4
ID0-ID3
5
GPI0-
GPI4
4
LAD0-
LAD3
WP
LFRAME
M50LPW041
TBL
CLK
IC
RP
INIT
VSS
AI05785
September 2002
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
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