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M34S32

32K Serial I2C Bus EEPROM With User-Defined Read-Only Block and 32-Byte OTP Page

STMicroelectronics 

M34S32

Byte Write. In the Byte Write mode the master

sends one data byte, which is acknowledged by

the memory. The master then terminates the

transfer by generating a STOP condition.

Page Write. The Page Write mode allows up to 32

bytes to be written in a single write cycle, provided

that they are all located in the same row of 32

bytes in the memory, that is the same Address bits

(b12 to b5). The master sends one up to 32 bytes

of data, which are each acknowledged by the

memory. After each byte is transferred, the inter-

nal byte address counter (5 Least Significant Bits

only) is incremented. The transfer is terminated by

the master generating a STOP condition. Care

must be taken to avoid address counter “roll-over”

which could result in data being overwritten.

Note that for any write mode, the generation by the

master of the STOP condition starts the internal

memory program cycle. This STOP condition will

trigger an internal memory program cycle only if

the STOP condition is internally decoded right af-

ter the ACK bit; any STOP condition decoded out

of this “10th bit” time slot will not trigger the internal

programming cycle. All inputs are disabled until

the completion of this cycle and the Memory will

not respond to any request.

Figure 8. I2C Bus Protocol

SCL

SDA

START

CONDITION

SDA

SDA

INPUT CHANGE

STOP

CONDITION

SCL

SDA

1

2

3

MSB

START

CONDITION

SCL

SDA

1

2

3

MSB

7

8

9

ACK

7

8

9

ACK

STOP

CONDITION

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