M34S32 Ver la hoja de datos (PDF) - STMicroelectronics

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M34S32

32K Serial I2C Bus EEPROM With User-Defined Read-Only Block and 32-Byte OTP Page

STMicroelectronics 

M34S32

EEPROM Addressing. A data byte in the memory

is addressed through 2 bytes of address informa-

tion. The Most Significant Byte is sent first and the

Least significant Byte is sent after. Bits b15 to b0

form the address of any byte of the memory. Bits

b15 to b12 are don’t care on the M34S32 series.

Table 9. Most Significant Byte

b15 b14 b13 b12 b11 b10 b9 b8

X

XXX

4. b15 to b12 are Don’t Care.

Write Operations

Following a START condition the master sends a

Device Select Byte with the RW bit reset to 0. The

memory acknowledges this and waits for 2 bytes

of address. These 2 address bytes (8 bits each)

provide access to any of the memory location.

Writing in the memory may be inhibited with WC

pin and WCpol bit (see Table 13 and Figure 11).

Table 10. Least Significant Byte

b7 b6 b5 b4 b3 b2 b1 b0

Figure 7. AC Waveforms

SCL

SDA IN

tCHCL

tCLCH

tDLCL

tDXCX

tCHDX

START

CONDITION

tCLDX

SDA

SDA

INPUT CHANGE

tCHDH

tDHDL

STOP &

BUS FREE

SCL

SDA OUT

tCLQV

DATA VALID

tCLQX

DATA OUTPUT

SCL

SDA IN

tCHDH

STOP

CONDITION

tW

WRITE CYCLE

tCHDX

START

CONDITION

AI00795B

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