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28C64AJI-4 Ver la hoja de datos (PDF) - Turbo IC Inc

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28C64AJI-4 Datasheet PDF : 4 Pages
1 2 3 4
Turbo IC, Inc.
28C64A
erase cycle; typically takes 20 msec. After a software chip clear op-
eration has been completed, all 64K bit locations of memory show
high level at read operation mode.
d.) Software Autoclear Disable Mode
This software algorithm disables the internal automatic clear before
write cycle. Table 4 shows the six steps needed to perform the auto-
clear disable mode:
ABSOLUTE MAXIMUM STRESS RANGES *
TEMPERATURE
“Absolute Maximum Ratings” may cause perma-
Storage:
-65° C to 150° C
Under Bias:
-55° C to 125° C
ALL INPUT OR OUTPUT VOLTAGES
with respect to Vss
+6 V to -0.3 V
nent damage to the device. This is a stress rating
only and functional operation of the device at
these or any other conditions above those indi-
cated in the operation section of this specifica-
tion is not implied. Exposure to absolute maxi-
mum rating conditions for extended periods may
affect device reliability.
RECOMMENDED OPERATING CONDITIONS
Step
1
2
3
4
5
6
7-70
Mode
Page Write
Page Write
Page Write
Page Write
Page Write
Page Write
Page Write
Address A12-A0
1555 Hex
0AAA Hex
1555 Hex
1555 Hex
0AAA Hex
1555 Hex
Address
Data I/O 7-0
AA Hex
55 Hex
80 Hex
AA Hex
55 Hex
40 Hex
Data
Page write operation using the software autoclear disable mode will
reduce programming time to typically 5 msec. The page write using
software autoclear disable mode is usually used after a chip clear or
a software chip clear operation. At the end of the six steps sequence,
the autoclear before write is disabled and will stay that way unless a
power-down occurs or the software autoclear enable procedure is
initiated.
e.) Software Autoclear Enable Mode
Automatic page clear before page write can be restored to 28C64A
either by Vcc power-down or by software autoclear enable mode.
Table 5 shows the six steps page write procedure needed to enable
software autoclear mode:
Step
1
2
3
4
5
6
7-70
Mode
Page Write
Page Write
Page Write
Page Write
Page Write
Page Write
Page Write
Address A12-A0
1555 Hex
0AAA Hex
1555 Hex
1555 Hex
0AAA Hex
1555 Hex
Address
Data I/O 7-0
AA Hex
55 Hex
80 Hex
AA Hex
55 Hex
50 Hex
Data
D.C. CHARACTERISTICS
Symbol Parameter Condition
Min
(C) =
(I) =
(M) =
COMMERICAL
INDUSTRIAL
MILITARY
Max Units
Icc Active Vcc CE=OE=Vil; All I/O
50 (C) mA
Current
Open, Min Read or
70 (I) mA
Write Cycle Time
90 (M) mA
Isb1 CMOS
CE=Vcc-0.3 V to
200 (C) µA
Standby
Vcc+1 V
300 (I&M) µA
Current
Isb2 TTL Standby CE=Vih, OE=Vil,
3
mA
Current
All I/O Open, Other
Inputs=Vcc Max
Vin=Vcc Max
Iil
Input
1
µA
Leakage
Current
Iol
Output
10
µA
Leakage
Current
Vil
Input Low
-0.1
-0.8
V
Voltage
Vih Input High
2 Vcc+0.3
V
Voltage
Vol Output Low Iol=2.1 mA
0.45
V
Voltage
Voh Output High Ioh=-0.45 mA 2.4
V
Voltage
Temperature Range:
Commercial:
Industrial:
Military:
0° C to 70° C
-40° C to 85° C
-55° C to 125° C
Vcc Supply Voltage:
5 V ± 10%
Endurance:
Data Retention:
100,000 Cycles/Byte (Typical)
10 Years
A.C. CHARACTERISTICS - READ OPERATION
Symbol
tacc
tce
toe
tdf
toh
28C64A-1 28C64A-2 28C64A-3 28C64A-4
Parameters Min Max Min Max Min Max Min MaxUnit
Address to
120
150
200
250 ns
Output Delay
CE to Output
120
150
200
250 ns
Delay
OE to Output
70
90
110
150 ns
OE to Output 0 40 0 60 0 90 0 90 ns
In High Z
Output Hold
0
0
0
0
ns
from Address
Changes, Chip
Enable or
Output Enable
Whichever
Occurs First
A.C. TEST CONDITIONS
Output Load : 1 TTL Load and Cl=100 pF
Input Rise and Fall Times : < 10 ns
Input Pulse Level : 0 V to 3 V
Timing Measurement Reference Level : 1.5 V
A.C. Read Wave Forms
ADDRESS
CE
OE
OUTPUT
ADDRESS VALID
tacc
tce
tdf
toe
HIGH-Z
toh
OUTPUT VALID
HIGH-Z

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