HEF40193B Ver la hoja de datos (PDF) - NXP Semiconductors.

Número de pieza

componentes Descripción

Fabricante

HEF40193B

4-bit up/down binary counter

NXP Semiconductors. 

NXP Semiconductors

HEF40193B

4-bit up/down binary counter

Table 7. Dynamic characteristics …continued

VSS = 0 V; Tamb = 25 C; for test circuit see Figure 7; unless otherwise specified.

Symbol Parameter

Conditions

VDD

Extrapolation formula[1] Min Typ Max Unit

tsu

set-up time

Dn to PL;

see Figure 6

5V

10 V

160 80 -

ns

60 30 -

ns

15 V

50 25 -

ns

th

hold time

Dn to PL;

see Figure 6

5V

10 V

+10 70 -

ns

+5 25 -

ns

15 V

+5 20 -

ns

[1] The typical values of the propagation delay and transition times are calculated from the extrapolation formulas shown (CL in pF).

Table 8. Dynamic power dissipation PD

PD can be calculated from the formulas shown. VSS = 0 V; tr = tf  20 ns; Tamb = 25 C.

Symbol Parameter

VDD Typical formula for PD (W)

where:

PD

dynamic power dissipation 5 V PD = 600  fi + (fo  CL)  VDD2 fi = input frequency in MHz,

10 V PD = 2700  fi + (fo  CL)  VDD2 fo = output frequency in MHz,

15 V

PD = 7500  fi + (fo  CL)  VDD2 CL = output load capacitance in pF,

VDD = supply voltage in V,

(fo  CL) = sum of the outputs.

HEF40193B

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 8 — 18 November 2011

© NXP B.V. 2011. All rights reserved.

10 of 19

Share Link: