AD6411AST Ver la hoja de datos (PDF) - Analog Devices
Número de pieza
componentes Descripción
Fabricante
AD6411AST Datasheet PDF : 11 Pages
| |||
AD6411
Transmit
DECT
Channel
9
8
7
6
5
4
3
2
1
0
A Counter
1
2
3
4
5
6
7
8
9
10
M Counter
34
34
34
34
34
34
34
34
34
34
Frequency/MHz
1881.792
1883.520
1885.248
1886.976
1888.704
1890.432
1892.160
1893.888
1893.888
1897.344
The A Counter range is 0–31, allowing the AD6411 to be used
in the extended DECT bands, up to the following maximum
frequency:
A Counter
31
M Counter
34
Frequency/MHz
1933.632
Receive (Local Oscillator Frequency)
Main values are shown for a 110.592 MHz IF frequency. Values
in parentheses are for the 112.32 MHz.
DECT
Channel
9
8
7
6
5
4
3
2
1
0
A Counter
1 (0)
2 (1)
3 (2)
4 (3)
5 (4)
6 (5)
7 (6)
8 (7)
9 (8)
10 (9)
M Counter Frequency/MHz
32
1771.200 (1769.472)
32
1772.928 (1771.200)
32
1774.656 (1772.928)
32
1776.384 (1774.656)
32
1778.112 (1776.384)
32
1779.840 (1778.112)
32
1781.568 (1779.840)
32
1783.296 (1781.568)
32
1785.024 (1783.296)
32
1786.752 (1785.024)
Serial Interface
The IC operating modes can be controlled via the 3-wire
serial interface or via the three external control lines provided
(TX_ENAB, RX_ENAB, SYN_ENAB). The three external
control lines allow mode control of the IC if the baseband con-
troller cannot access the serial interface between slots. In either
case the 3-wire serial interface is used to program the channel
number. Detailed below is the register setup and the serial
interface operation.
The serial interface consists of a 16-bit shift register and two
registers for configuration of the IC and mode control. This
allows mode control of the IC with a single 16-bit write. DATA
is the serial data input (data MSB first), CLK is the shift regis-
ter clock (positive edge trigger), EN (positive edge trigger) is the
serial interface enable. All internal register values are retained
when sections of the IC are powered down. Figure 3 shows the
timing diagram for the serial interface.
t HEN
EN
t DHD
t DST
t CLK
t DEN
CLK
DATA
MSB
LSB
Figure 3. Serial Interface Timing Diagram
Parameter
Symbol
Maximum Serial Clock Frequency
Serial Data Set Up Time
Serial Data Hold Time
Enable Set Up to Clock High
Clock Low to Enable Low
f_clk
t_dst
t_dhd
t_hen
t_den
Typ Unit
13.824
8
8
10
5
MHz
ns
ns
ns
ns
The Least Significant Bit of the serial control word selects either
the “one-time setup” register or the operating mode register,
with the remaining 15 bits as data. Table II below details the
internal IC register mapping.
Table II. Register Mapping
Address (D0)
0
1
Function
One-Time IC Setup
IC Operating Mode
Comments
See Table III
See Table IV
AD6411 INITIAL SETUP
On power-up the state of the IC is not defined. A one-time setup
register must be loaded through the serial interface port, and is
selected when the LSB of the serial word is 0. After this one-
time setup, a single serial word controls operation of the IC.
Table III. One-Time IC Setup Register
D15 D14 D13 D12 D11 D10 D9 D8
X
RSB TSB SSB RXM1 RXM0 TXM BSWS
D7 D6 D5 D4 D3 D2 D1 D0
CF0 CT1 CT0 DSD SFM PDS RD 0
REV. 0
–7–
Share Link: 