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AD707JR-REEL7 Ver la hoja de datos (PDF) - Analog Devices

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AD707JR-REEL7
AD
Analog Devices AD
AD707JR-REEL7 Datasheet PDF : 8 Pages
1 2 3 4 5 6 7 8
AD707
OFFSET NULLING
The input offset voltage of the AD707 is the lowest available in
a bipolar op amp, but if additional nulling is required, the
circuit shown in Figure 19 offers a null range of 200 µV. For
wider null capability, omit R1 and substitute a 20 kpotenti-
ometer for R2.
OPERATION WITH A GAIN OF 100
Demonstrating the outstanding dc precision of the AD707 in
practical applications, Table I shows an error budget calculation
for the gain of –100 configuration shown in Figure 21.
Table I. Error Budget
+VS
0.1µF
R1
10k
OFFSET
ADJUST
Error Source
Maximum Error Contribution
Av = 100 (C Grade)
(Full Scale: VOUT = 10 V, VIN = 100 mV)
7
2
R2
1 2k
VOS
15 µV/100 mV
= 150 ppm
IOS
(100 )(1 nA)/100 mV = 1 ppm
OBSOLETE 8
AD707
6
3
4 0.1µF
–VS
Figure 19. External Offset Nulling and Power Supply
Bypassing
GAIN LINEARITY INTO A 1 kLOAD
The gain and gain linearity of the AD707 are the highest
available among monolithic bipolar amplifiers. Unlike other dc
precision amplifiers, the AD707 shows no degradation in gain or
gain linearity when driving loads in excess of 1 kover a ± 10 V
output swing. This means high gain accuracy is assured over the
output range. Figure 20 shows the gain of the AD707, OP07, and
the OP77 amplifiers when driving a 1 kload.
The AD707 will drive 10 mA of output current with no signifi-
cant effect on its gain or linearity.
Gain (2 kLoad) (100 V/8 × 106)100 mV
Noise
0.35 µV/100 mV
VOS Drift
(0.1 V/°C)/100 mV
= 13 ppm
= 4 ppm
= 1 ppm/°C
= 168 ppm
+1 ppm/°C
Total Unadjusted Error
@ +25°C
@ –55°C to +125°C
With Offset Calibrated Out
@ +25°C
@ –55°C to +125°C
= 168 ppm > 12 Bits
= 268 ppm > 11 Bits
= 17 ppm > 15 Bits
= 117 ppm > 13 Bits
100
VIN
10k
+VS 0.1µF
2
7
AD707
6
VOUT
AD707
3
99
4
0.1µF
–VS
OP07
OP77
@ +25°C
RLOAD = 1k
–15
–10
–5
0
5
10
15
OUTPUT VOLTAGE – V
Figure 20. Gain Linearity of the AD707 vs.
Other DC Precision Op Amps
Figure 21. Gain of –100 Configuration
Although the initial offset voltage of the AD707 is very low, it is
nonetheless the major contributor to system error. In cases
requiring additional accuracy, the circuit shown in Figure 19
can be used to null out the initial offset voltage. This method
will also cancel the effects of input offset current error. With the
offsets nulled, the AD707C will add less than 17 ppm of error.
This error budget assumes no error in the resistor ratio and no
errors from power supply variation (the 120 dB minimum PSRR
of the AD707C makes this a good assumption). The external
resistors can cause gain error from mismatch and drift over
temperature.
–6–
REV. B

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