IXFC80N10 Ver la hoja de datos (PDF) - IXYS CORPORATION
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IXFC80N10 Datasheet PDF : 2 Pages
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ADVANCE TECHNICAL INFORMATION
HiPerFETTM MOSFET
ISOPLUS220TM
IXFC 80N10
Electrically Isolated Back Surface
N-Channel Enhancement Mode
High dv/dt, Low trr, HDMOSTM Family
V = 100 V
DSS
I
= 80 A
D25
R
DS(on)
= 12.5 mΩ
t
rr
≤ 200 ns
Symbol
VDSS
VDGR
VGS
VGSM
ID25
I
L(RMS)
IDM
IAR
E
AR
EAS
dv/dt
PD
TJ
T
JM
Tstg
TL
F
C
VISOL
Weight
Symbol
VDSS
VGS(th)
IGSS
IDSS
RDS(on)
Test Conditions
TJ = 25°C to 150°C
TJ = 25°C to 150°C; RGS = 1 MΩ
Continuous
Transient
TC = 25°C
Lead current limit
TC = 25°C, pulse width limited by TJM
TC = 25°C
TC = 25°C
IS ≤ IDM, di/dt ≤ 100 A/µs, VDD ≤ VDSS,
TJ ≤ 150°C, RG = 2 Ω
TC = 25°C
1.6 mm (0.062 in.) from case for 10 s
Mounting force
50/60 Hz, RMS, leads-to-tab
Maximum Ratings
100
V
100
V
±20
V
±30
V
80
A
55
A
320
A
80
A
50
mJ
2.5
J
5 V/ns
230
W
-55 ... +150
°C
150
°C
-55 ... +150
°C
300
°C
11..65/2.4..11 Nm/lb
2500
V~
2
g
Test Conditions
VGS = 0 V, ID = 250 µA
VDS = VGS, ID = 4 mA
VGS = ±20 VDC, VDS = 0
V DS = VDSS
VGS = 0 V
VGS = 10 V, ID = IT
Notes 1, 2
Characteristic Values
(TJ = 25°C, unless otherwise specified)
min. typ. max.
100
2.0
TJ = 25°C
TJ = 125°C
V
4.0 V
±100 nA
50 µA
1 mA
12.5 mΩ
ISOPLUS 220TM
G
D
S
Isolated back surface*
G = Gate,
S = Source
D = Drain,
* Patent pending
Features
l Silicon chip on Direct-Copper-Bond
substrate
- High power dissipation
- Isolated mounting surface
- 2500V electrical isolation
l Lowdraintotabcapacitance(<35pF)
l Low RDS (on)
l Ruggedpolysilicongatecellstructure
l UnclampedInductiveSwitching(UIS)
rated
l FastintrinsicRectifier
Applications
l DC-DC converters
l Batterychargers
l Switched-modeandresonant-mode
power supplies
l DC choppers
l AC motor control
Advantages
l Easy assembly: no screws or isolation
foils required
l Space savings
l High power density
l Lowcollectorcapacitancetoground
(low EMI)
© 2001 IXYS All rights reserved
98852 (8/01)
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