DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

L6926D Ver la hoja de datos (PDF) - STMicroelectronics

Número de pieza
componentes Descripción
Fabricante
L6926D Datasheet PDF : 8 Pages
1 2 3 4 5 6 7 8
L6926D
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
V6
Input voltage
V5
Output switching voltage
V1
Shutdown
V3
Feedback voltage
V2
Analog input voltage
Ptot Power dissipation at Tamb=70°C
Tj
Junction operating temperature range
Tstg Storage temperature range
LX Pin Maximum Withstanding Voltage Range Test Condition: CDF-
Other pins AEC-Q100-002- “Human Body Model” Acceptance Criteria:
“Normal Performance’
PIN CONNECTION
RUN
COMP
VFB
GND
1
8
2
7
3
6
4
5
D01IN1239AMOD
PGOOD
SYNC
VCC
LX
Value
-0.3 to 6
-1 to VCC
-0.3 to VCC
-0.3 to VCC
-0.3 to VCC
0.45
-40 to 150
-65 to 150
±1000
±2000
Unit
V
V
V
V
V
W
°C
°C
V
V
THERMAL DATA
Symbol
Parameter
Rth j-amb Thermal Resistance Junction to Ambient
Value
180
Unit
°C/W
PIN FUNCTIONS
N
Name
1
RUN
2
COMP
3
VFB
4
GND
5
LX
6
VCC
7
SYNC
8
PGOOD
Description
Shutdown input. When connected to a low level (lower than 0.4V) the device stops working.
When high (higher than 1.3V) the device is enabled.
Error amplifier output. A compensation network has to be connected to this pin. Usually a
220pF capacitor is enough to guarantee the loop stability.
Error amplifier inverting input. The output voltage can be adjusted from 0.6V up to the input
voltage by connecting this pin to an external resistor divider.
Ground.
Switch output node. This pin is internally connected to the drain of the internal switches.
Input voltage. The start up input voltage is 2.2V (typ) while the operating input voltage range is
from 2V to 5.5V. An internal UVLO circuit realizes a 100mV (typ.) hysteresis.
Operating mode selector input. When high (higher than 1.3V) the Low Consumption Mode is
selected. When low (lower than 0.5V) the Low Noise Mode is selected. If connected with an
appropriate external synchronization signal (from 500KHz up to 1.4MHz) the internal
synchronization circuit is activated and the device works at the same switching frequency.
Power good comparator output. It is an open drain output. A pull-up resistor should be
connected between PGOOD and VOUT (or VCC depending on the requirements). The pin is
forced low when the output voltage is lower than 90% of the regulated output voltage and goes
high when the output voltage is greater than 90% of the regulated output voltage. If not used the
pin can be left floating.
2/8

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]