EL7155CN Ver la hoja de datos (PDF) - Elantec -> Intersil

Número de pieza

componentes Descripción

Fabricante

EL7155CN

High Performance Pin Driver

Elantec -> Intersil 

EL7156C

High Performance Pin Driver

Block Diagram

VS+

IN

Level

Shifter

GND

OE

VH

3-State

Control

OUT

VS-

VL

Application Information

Product Description

The EL7156C is a high performance 40MHz pin driver.

It contains two analog switches connecting VH and VL

to OUT. Depending on the value of the IN pin, one of

the two switches will be closed and the other switch

open. An output enable (OE) is also supplied which

opens both switches simultaneously.

Due to the topology of the EL7156C, both the VH and

VL pins can be connected to any voltage between the

VS+ and VS- pins.

The EL7156C is available in both the 8-pin SOIC and

the 8-pin PDIP packages. The relevant package should

be chosen depending on the calculated power

dissipation.

Supply Voltage Range and Input Compatibility

The EL7156C is designed for operation on supplies from

5V to 15V (4.5V to 18V maximum). The table on page 6

shows the specifications for the relationship between the

VS+, VS-, VH, VL and GND pins.

All input pins are compatible with both 3V and 5V

CMOS signals. With a positive supply (VS+) of 5V, the

EL7156C is also compatible with TTL inputs.

Power Supply Bypassing

When using the EL7156C, it is very important to use

adequate power supply bypassing. The high switching

currents developed by the EL7156C necessitate the use

of a bypass capacitor between the supplies (VS+ & VS-)

and GND pins. It is recommended that a 2.2µF tantalum

capacitor be used in parallel with a 0.1µF low-induc-

tance ceramic MLC capacitor. These should be placed as

close to the supply pins as possible. It is also recom-

mended that the VH and VL pins have some level of

bypassing, especially if the EL7156C is driving highly

capacitive loads.

Power Dissipation Calculation

When switching at high speeds, or driving heavy loads,

the EL7156C drive capability is limited by the rise in die

temperature brought about by internal power dissipation.

For reliable operation die temperature must be kept

below Tjmax (125°C). It is necessary to calculate the

8

Share Link: