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MC74VHCU04D

Hex Inverter (Unbuffered)

ON Semiconductor 

MC74VHCU04

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ DC ELECTRICAL CHARACTERISTICS

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Symbol

Parameter

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Iin

Maximum Input

Leakage Current

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ICC

Maximum Quiescent

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Supply Current

Test Conditions

Vin = 5.5 or GND

Vin = VCC or GND

VCC

V

0 to 5.5

5.5

TA = 25°C

Min

Typ

Max

± 0.1

2.0

TA = –40 to 85°C

Min

Max Unit

± 1.0

µA

20.0

µA

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3.0ns)

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Symbol

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ tPLH,

tPHL

Parameter

Maximum Propagation Delay,

A or B to Y

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Cin

Maximum Input Capacitance

Test Conditions

VCC = 3.3 ± 0.3V CL = 15pF

CL = 50pF

VCC = 5.0 ± 0.5V CL = 15pF

CL = 50pF

TA = 25°C

Min

Typ

Max

5.0

8.9

7.5

11.4

3.5

5.5

5.0

7.0

5

10

TA = –40 to 85°C

Min

Max Unit

1.0

10.5 ns

1.0

13.0

1.0

6.5

1.0

8.0

10

pF

Typical @ 25°C, VCC = 5.0V

CPD Power Dissipation Capacitance (Per Inverter) (Note 1.)

9

pF

1. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.

Average operating current can be obtained by the equation: ICC(OPR) = CPD  VCC  fin + ICC/6 (per buffer). CPD is used to determine the

no–load dynamic power consumption; PD = CPD  VCC2  fin + ICC  VCC.

NOISE CHARACTERISTICS (Input tr = tf = 3.0ns, CL = 50pF, VCC = 5.0V)

Symbol

VOLP

VOLV

VIHD

VILD

Characteristic

Quiet Output Maximum Dynamic VOL

Quiet Output Minimum Dynamic VOL

Minimum High Level Dynamic Input Voltage

Maximum Low Level Dynamic Input Voltage

TA = 25°C

Typ

Max

Unit

0.5

0.8

V

–0.5

–0.8

V

4.0

V

1.0

V

A

50%

tPLH

Y 50% VCC

VCC

GND

tPHL

Figure 3. Switching Waveforms

DEVICE

UNDER

TEST

TEST POINT

OUTPUT

CL*

*Includes all probe and jig capacitance

Figure 4. Test Circuit

INPUT

Parasitic Diode

OUTPUT

Parasitic Diode

Figure 5. Input Equivalent Circuit

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